Digital Loop Filter for High-Resolution DCO Noise Shaping

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Solution Overview

Problem

Current digitally controlled oscillator (DCO) circuits in phase locked loops face limitations due to parasitic capacitances and the effectiveness of Sigma-Delta modulators, which restrict frequency resolution and phase noise performance, especially at high frequencies.

Innovation Solution

The proposed solution involves a digitally controlled oscillator circuit arrangement that precomputes frequency modulation streams at the reference clock rate, stores them in memory, and feeds them to the DCO frequency control elements at the oscillation frequency rate, allowing for noise shaping without requiring high operational frequencies for the Sigma-Delta Modulator.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high frequency switching among discrete frequency levels is used to achieve fractional frequency resolution, then frequency resolution is improved, but the operational frequency requirement for the Sigma-Delta Modulator increases

Engineering Contradiction:
Improvefrequency resolutionVSAvoidoperational frequency of Sigma-Delta Modulator
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The patent precomputes frequency modulation streams at a lower reference clock rate and stores them in memory. These precomputed streams are then fed to the DCO frequency control elements at the higher oscillation frequency rate. This allows the Sigma-Delta Modulator to operate at the lower reference clock frequency while still achieving high-rate noise shaping and fractional frequency resolution, effectively decoupling the computational rate from the operational frequency requirement.

Inventive Principle:
Principle #10Preliminary action

2Speed

If moderate division of Local Oscillator frequency is used for noise shaping, then bandwidth is improved, but frequency resolution deteriorates

Engineering Contradiction:
ImprovebandwidthVSAvoidfrequency resolution
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

The patent segments the frequency control into multiple independent elements (first, second, and third frequency control elements) that can be independently adjusted. This segmentation allows different portions of the frequency spectrum to be controlled with different resolutions and bandwidths, enabling simultaneous optimization of both bandwidth and frequency resolution across different frequency ranges.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension by precomputing and storing frequency modulation streams in memory. This allows the system to achieve high-rate noise shaping without requiring the Sigma-Delta Modulator to operate at high frequencies, effectively adding a time-memory dimension to resolve the bandwidth-resolution trade-off.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If atto-Farad scale capacitances are used in state-of-the-art DCOs, then frequency tuning range is improved, but frequency resolution is limited by parasitic capacitances

Engineering Contradiction:
Improvefrequency tuning rangeVSAvoidfrequency resolution
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent introduces precomputed frequency modulation streams stored in memory as an intermediary between the Sigma-Delta Modulator and the DCO frequency control elements. This intermediary allows the system to achieve fine frequency resolution without being limited by parasitic capacitances, as the frequency modulation is applied through digital control streams rather than direct capacitance adjustment.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11558059B2Concept for a digital controlled loop and a digital loop filter
Publication Date: 2023.01.17 INTEL CORP
  • US11558059B2 patent drawing
  • US11558059B2 patent drawing
  • US11558059B2 patent drawing

AI summary

Examples relate to a digitally controlled oscillator circuit arrangement, a digitally controlled oscillation means, a method for a digitally controlled oscillator, a digital loop filter circuit arrangement, a digital loop filtering means, a method for a digital loop filter, a phase locked loop circuit arrangement and phase locked loop, a user device and a base station. The digitally controlled oscillator circuit arrangement comprises input circuitry for obtaining a frequency setting signal, the frequency setting signal comprising a plurality of signal components, selection circuitry for selecting one signal component of the plurality of signal components of the frequency setting signal based on an oscillation signal of the digitally controlled oscillator circuit arrangement, wherein the selection circuitry comprises counting circuitry and multiplexing circuitry, signal generation circuitry for generating the oscillation signal based on the selected signal component of the frequency setting signal, and output circuitry for providing the oscillation signal.