Digital Control Loop Gain Adjustment for Faster Stable Convergence

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Solution Overview

Problem

The challenge in communication systems is maintaining a signal at a consistent power level for downstream processing, as received signals can vary significantly due to channel quality, transmission power, and other factors, leading to inefficiencies in automatic gain control systems.

Innovation Solution

A method and system using a variable gain amplifier (VGA) with a dynamic step size and variable counter sizes to adjust the signal magnitude, involving a detector, comparator, and digital control module to generate a control vector that adjusts the gain based on target values, thereby stabilizing the signal power.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a fixed step size is used in the automatic gain control system, then the system is simple to implement, but the convergence time to target power level is long

Engineering Contradiction:
Improveconvergence timeVSAvoidcontrol system complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent implements dynamic step size adjustment in the AGC system, where the step size changes based on the current signal power level and distance from target. The control module dynamically selects between different step sizes (first step size for large deviations, second step size for small deviations) to optimize convergence speed while maintaining system stability, directly resolving the contradiction between convergence time and system complexity.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the control parameter (step size) based on the system state. When the signal power is far from the target, a larger step size is used for fast convergence. When close to the target, a smaller step size is used for precise control. This parameter adaptation resolves the contradiction by making the system both fast-converging and stable without requiring overly complex architecture.

Inventive Principle:
Principle #35Parameter changes

2Speed

If a large step size is used to speed up convergence, then the convergence rate increases, but the system becomes unstable and oscillates around the target value

Engineering Contradiction:
Improveconvergence rateVSAvoidcontrol stability
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent uses dynamic step size selection based on real-time feedback from the detector and comparator. The control module adjusts the step size dynamically: using larger steps when far from target for fast convergence, and smaller steps when near target for stability. This dynamic adaptation resolves the contradiction between convergence speed and stability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements a feedback mechanism where the detector measures the actual signal power, the comparator compares it with the target power, and the control module uses this feedback information to adjust the step size accordingly. This closed-loop feedback ensures both fast convergence and stability by continuously adapting the control parameters based on system state.

Inventive Principle:
Principle #23Feedback

3Stability of the object's composition

If a small step size is used to maintain stability, then the system remains stable, but the convergence time becomes excessively long

Engineering Contradiction:
Improvecontrol stabilityVSAvoidconvergence time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent implements dynamic step size adjustment where the step size is not fixed but changes based on the system state. When the signal power is far from the target, the system uses a larger step size for fast convergence. When close to the target, it switches to a smaller step size for stable settling. This dynamic behavior resolves the contradiction by making the system both fast and stable at different stages.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic evaluation of the signal power level and corresponding adjustment of step size. The control module periodically checks the distance from target and adjusts the step size accordingly, creating a rhythm of fast approach followed by fine-tuning, which resolves the contradiction between speed and stability.

Inventive Principle:
Principle #19Periodic action

4Adaptability or versatility

If the counter size is fixed, then the hardware implementation is simpler, but the ability to adapt to different convergence stages is reduced

Engineering Contradiction:
Improveadaptation to convergence stagesVSAvoidcounter control complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent makes the counter size dynamic rather than fixed. The control module adjusts the counter size based on the current convergence stage: using larger counter sizes for early-stage coarse adjustment and smaller counter sizes for late-stage fine adjustment. This dynamic adaptation enhances versatility without requiring overly complex hardware.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent segments the convergence process into different stages (coarse adjustment stage and fine adjustment stage), with different counter sizes optimized for each stage. This segmentation allows the system to handle different convergence requirements efficiently, improving adaptability while keeping each segment's implementation relatively simple.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11848653B2Method and apparatus to speed convergence and control behavior of digital control loop
Publication Date: 2023.12.19 MACOM TECH SOLUTIONS HLDG INC
  • US11848653B2 patent drawing
  • US11848653B2 patent drawing
  • US11848653B2 patent drawing

AI summary

A system to control convergence of a loop to a reference value. A device, under control of the control loop, generates an output signal. A comparator compares the output signal to a reference value. Responsive to the output signal being less than the reference value, outputting an up signal and, responsive to the output signal being greater than the reference value, outputting a down signal. A counter is configured to maintain a counter value which is incremented in response to an up signal and decremented in response to a down signal. The counter outputs a gain control value. An up/down signal tracker is configured to track a pattern of up signals and down signals and compare the tracked pattern to one or more predetermined patterns such that, responsive to the up signals and down signals matching one of the one or more predetermined patterns, the counter size is decreased.