Digital Locked Loop for Temperature-Stable MEMS Clock Ratios
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Solution Overview
Problem
MEMS oscillators face short-term stability issues such as phase noise and jitter, and are susceptible to temperature variations, which affect the accuracy of generated clock signals.
Innovation Solution
A digital locked loop, either in all-digital phase-locked loop (ADPLL) or all-digital frequency-locked loop (ADFLL) configuration, is used in conjunction with a MEMS oscillator to adjust the frequency ratio based on temperature, utilizing a temperature sensor and look-up table or compensation equations to stabilize the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a MEMS oscillator is used to generate clock signals, then the device can be manufactured with high precision and small size, but the output signal exhibits short-term stability issues such as phase noise and jitter
Solution Approach 1:
A digital locked loop (DPLL) is introduced as an intermediary system between the MEMS oscillator and the final clock output. The DPLL receives the MEMS oscillator signal, processes it through digital phase/frequency detection and correction mechanisms, and outputs a stabilized clock signal with reduced phase noise and jitter while maintaining the benefits of MEMS fabrication
Solution Approach 2:
The digital locked loop implements a feedback mechanism where the output clock signal is continuously compared with the MEMS oscillator reference, and correction signals are generated to minimize phase and frequency deviations. This closed-loop feedback system actively compensates for short-term stability issues in real-time
2Device complexity
If a MEMS oscillator operates without temperature compensation, then the device structure remains simple, but the output frequency varies with temperature changes
Solution Approach 1:
A temperature sensor is integrated into the system to continuously monitor temperature changes, and this temperature information is fed back to a frequency ratio determination circuit that adjusts the DPLL parameters accordingly. This feedback mechanism compensates for temperature-induced frequency drift while maintaining relatively simple device structure
Solution Approach 2:
The system dynamically changes the frequency ratio parameter of the DPLL based on temperature conditions. By adjusting this parameter according to temperature sensor readings, the system compensates for temperature effects on MEMS oscillator frequency without requiring complex structural modifications
3Ease of operation
If the frequency ratio is fixed, then the system operation is simple, but the system cannot adapt to different operating conditions and temperature variations
Solution Approach 1:
The frequency ratio parameter is transformed from a fixed value to a dynamic parameter that can be adjusted based on operating conditions. The DPLL architecture allows the frequency ratio to be modified in response to temperature changes and other operational requirements, providing adaptability while maintaining ease of operation through automated control
Data Source
AI summary
A Micro Electrical Mechanical System (MEMS) oscillator supplies a MEMS clock signal to a digital locked loop that generates an output clock signal having a frequency that corresponds to a desired frequency ratio between the MEMS oscillator output signal and the digital locked loop output signal. The frequency ratio may be determined, at least in part, as a function of temperature.