Digital MRA Compensation for ADC-Limited Magnetic Read Signals

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Solution Overview

Problem

Magnetic read-elements exhibiting magnetoresistive asymmetry (MRA) hinder data recovery from magnetic storage media due to inefficient utilization of analog-to-digital converter (ADC) input range, leading to signal saturation and loss of detail, with existing analog MRA compensation methods being complex, power-intensive, and difficult to adapt to variations in MRA.

Innovation Solution

A hybrid analog/digital or all-digital architecture that includes digital magnetoresistive asymmetry (MRA) compensation, where analog MRA is fixed to cancel the majority of MRA before ADC sampling, and digital MRA compensation is used to adjust for residual MRA and DC offsets, allowing for efficient ADC input range utilization without degrading signal quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If analog MRA compensation is used, then MRA correction is achieved, but device complexity and power consumption increase

Engineering Contradiction:
ImproveMRA compensation effectivenessVSAvoidanalog circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent replaces complex analog MRA compensation circuits with a digital signal processing approach. The analog read signal is converted to digital form, and MRA compensation is performed through digital filtering and processing algorithms, eliminating the need for complex analog compensation hardware while achieving the same correction effect.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent introduces an intermediate digital signal processing stage between the analog read element and the final data recovery. This intermediary digital domain allows for flexible and adaptive MRA compensation without requiring complex analog circuitry, serving as a mediator that simplifies the overall system architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If analog MRA compensation is used, then MRA correction is achieved, but power consumption increases

Engineering Contradiction:
ImproveMRA compensation effectivenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent substitutes power-hungry analog compensation circuits with energy-efficient digital signal processing. Digital MRA compensation consumes significantly less power while providing the same correction functionality, directly addressing the power consumption issue.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If ADC input range is not optimized, then signal processing is simplified, but signal saturation and detail loss occur

Engineering Contradiction:
Improvesignal processing complexityVSAvoidsignal quality
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent performs preliminary MRA compensation and signal optimization before the ADC conversion stage. By pre-processing the analog signal to optimize its amplitude distribution and remove MRA effects beforehand, the system ensures that the ADC operates within its optimal input range, preventing saturation and preserving signal detail without requiring complex post-processing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240144959A1Magnetoresistive asymmetry compensation
Publication Date: 2024.05.02 SEAGATE TECH LLC
  • US20240144959A1 patent drawing
  • US20240144959A1 patent drawing
  • US20240144959A1 patent drawing

AI summary

Systems and methods are disclosed for magnetoresistive asymmetry (MRA) compensation using a digital compensation scheme. In certain embodiments, a method may comprise receiving an analog signal at a continuous-time front end circuit, and performing analog offset compensation to constrain the extrema of the analog signal to adjust a dynamic range based on an input range of an analog-to-digital converter (ADC), rather than to modify the analog signal to have a zero mean. The method may further comprise converting the analog signal to a digital sample sequence via the ADC; performing, via a digital MRA compensation circuit, digital MRA compensation on the digital sample sequence; receiving, via a digital backend (DBE) subsystem, the digital sample sequence prior to digital MRA compensation; and generating, via a DBE, a bit sequence corresponding to the analog signal based on an output of the DBE subsystem and an output of the digital MRA compensation circuit.