Digital Clean-Up Oscillator for Low-Frequency Phase Wander Removal

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Solution Overview

Problem

Conventional clean-up oscillators are limited in their ability to remove low-frequency phase noise from precision clock signals, as they are constrained by 1/f noise and the natural Q of the oscillator, which limits filtering to about 1 Hz.

Innovation Solution

A digital clean-up oscillator is designed with a precision digital frequency tracker, a low-pass filter, a phase increment calculator, a direct digital synthesizer, and a digital phase to clock converter, which allows for jitter cleaning on timescales longer than conventional oscillators by using a high-stability reference oscillator and digital signal processing techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional clean-up oscillator uses a high-Q OCXO with voltage control input locked to an accurate input signal via a phase-locked loop, then frequency accuracy and precision are maintained, but low-frequency phase wander filtering is limited to about 1 Hz due to the natural Q of the OCXO

Engineering Contradiction:
Improvephase noise filtering capabilityVSAvoidfrequency range of phase wander filtering
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The patent replaces the conventional voltage-controlled OCXO mechanism with a digital direct synthesizer that generates the output signal by counting reference clock cycles and applying phase corrections based on filtered frequency measurements. This substitution of the mechanical/electrical oscillation mechanism with a digital counting and synthesis mechanism enables extended low-frequency phase wander filtering capability beyond the 1 Hz limit of conventional OCXOs.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Object-generated harmful factors

If the OCXO is steered with a control voltage in the PLL loop to filter phase noise, then phase noise is reduced, but the natural Q of the OCXO limits filtering effectiveness at frequencies below 1 Hz

Engineering Contradiction:
Improvephase noiseVSAvoidlow-frequency phase wander removal
Core Design Contradiction:
Object-generated harmful factorsVSReliability

Solution Approach 1:

The patent extracts the phase wander removal function from the OCXO's natural Q-limited mechanism and implements it separately through a digital frequency tracker and low-pass filter that measure and filter frequency variations before generating phase corrections. This extraction allows independent optimization of the filtering capability without being constrained by the OCXO's natural Q.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary measurement and filtering of the reference clock frequency using a digital frequency tracker and low-pass filter before the frequency variations can affect the output signal. By pre-filtering the frequency measurements on timescales longer than the phase change interval, the system prevents low-frequency phase wander from being transferred to the output clock signal.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12316332B2Digital clean up oscillator
Publication Date: 2025.05.27 NAT RES COUNCIL OF CANADA
  • US12316332B2 patent drawing
  • US12316332B2 patent drawing
  • US12316332B2 patent drawing

AI summary

A digital clean-up oscillator and associated method are provided for cleaning jitter from a noisy clock signal, comprising receiving a reference clock oscillator signal and the noisy clock signal to be cleaned: measuring the frequency of the reference clock signal in the time domain of the noisy clock signal: filtering any frequency variations from the measured frequency of the reference clock signal on timescales shorter than a phase change interval Tau_clean over which jitter in the noisy clock signal is to be cleaned; generating a phase increment signal DDS_pinc based on the measured and filtered frequency of the reference clock signal: clocking the phase increment signal DDS_pinc with the reference clock signal for generating an output digital phase ramp signal φ_DDS(t) that tracks the frequency of the noisy clock signal with phase wander removed on timescales less than the phase change interval Tau_clean; and converting the output digital phase ramp signal φ_DDS(t) to an output jitter-cleaned time domain clock signal frequency locked to the noisy clock signal.