Digital PCM Array With Binary Weight Encoding for Stable Analog Computing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current PCM technologies face challenges in neuromorphic computing due to unreliable bi-directionality, nonlinear conductance update, conductance drift, difficulty in retaining intermediate states, and programming and READ noise, limiting their utility in artificial intelligence matrix multiplications.
Innovation Solution
A digital phase change memory (PCM) array is designed with memristive cells grouped into sub-columns, utilizing binary states to represent weights from −2n−1 to 2n−1−1, employing analog-to-digital converters, shifters, adders, and subtractors to perform matrix multiplications efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If intermediate conductance states are used to represent multiple resistance values, then the computational capability is improved, but the reliability deteriorates due to conductance drift and difficulty in retaining intermediate states
Solution Approach 1:
The patent segments each weight element into multiple PCM cells (e.g., 3 cells per weight) that can be independently controlled. This segmentation allows the system to represent multiple resistance values through combinatorial states of discrete cells rather than relying on unstable intermediate conductance states of single cells, thereby improving both computational capability and reliability
Solution Approach 2:
The patent uses multiple PCM cells to represent each weight element, creating redundant copies that can be combined to achieve desired resistance values. This copying approach enables stable representation of multiple resistance values through the collective state of multiple cells rather than relying on a single cell's intermediate state
2Measurement precision
If additional PCM cells are used to reduce statistical error, then the accuracy is improved, but the device complexity increases
Solution Approach 1:
The patent merges multiple PCM cells into a single functional unit representing one weight element. By combining the conductance of multiple cells through parallel connection, the system achieves statistical error reduction and improved accuracy while presenting a simplified interface where one logical weight element controls a group of physical cells
3Reliability
If binary states are used instead of intermediate conductance states, then the reliability is improved, but the manufacturing precision requirements worsen
Solution Approach 1:
The patent changes the operational parameter from continuous conductance control to discrete binary state control. By using only the stable crystalline (high conductance) and amorphous (low conductance) phases without relying on intermediate states, the system improves reliability while the manufacturing precision requirement shifts from controlling phase proportions to simply achieving complete phase transitions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables stable and accurate weight storage, reduces conductance drift, and enhances computing speed and energy efficiency, making it suitable for artificial intelligence applications.
Implementation Method 1
Heat produced by the passage of an electric current through a heating element can quickly heat and quench the glass, making it amorphous, or hold it in its crystallization temperature range for some time, thereby switching it to a crystalline state.
Implementation Method 2
Heat produced by the passage of an electric current through a heating element
Data Source
AI summary
A plurality of bit lines corresponding to elements of an input vector intersect a plurality of word lines and a plurality of memristive cells are located at the intersections. At least three cells are grouped together to represent a single matrix element. At least three word lines correspond to each element of an output vector. An A/D converter is coupled to each of the word lines, and for each line, except a first, in each group, a shifter has an input coupled to one of the A/D converters. For each group, an addition-subtraction block adds the output of the A/D converter coupled to the first one of the word lines to outputs of each of the shifters except that for a last one of the word lines, subtracts the output of the last shifter, and outputs a corresponding element of an output vector.