Digital Period Divider for Unknown Frequency Precision

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Solution Overview

Problem

Existing digital systems lack an efficient method to precisely divide unknown frequencies, such as motor rotation frequencies or power mains signals, into desired steps like 360 degrees or Hz, especially in microcontroller implementations.

Innovation Solution

A digital period divider system comprising MSB and LSB counters connected in series, with a modulo comparator and flip-flop logic, allowing for precise division of unknown frequencies using a known system clock and generating PWM signals, enabling direct angular measurements without sine, cosine, or tangent computations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional frequency division methods are used, then frequency division can be achieved, but the system complexity increases and precision is insufficient for unknown frequencies

Engineering Contradiction:
Improvefrequency division precisionVSAvoidsystem complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The frequency division function is segmented into two independent counters: a first counter for measuring the period of the unknown frequency signal, and a second counter for generating the divided frequency output. This segmentation allows each counter to be optimized for its specific function, improving overall precision without requiring a single complex frequency division circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first counter performs preliminary measurement of the unknown frequency period before the second counter generates the divided frequency output. By pre-measuring the period T of the unknown signal using the first counter, the system can then accurately generate N divided frequencies using the second counter, ensuring precision for unknown frequencies without real-time complex calculations.

Inventive Principle:
Principle #10Preliminary action

2Measurement precision

If computational methods (sine, cosine, tangent) are used for angular measurements, then accurate angular positions can be obtained, but computational latency and processing complexity increase

Engineering Contradiction:
Improveangular measurement accuracyVSAvoidcomputational latency
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent replaces computational mathematical functions (sine, cosine, tangent) with a direct digital counting mechanism. The second counter directly counts clock cycles corresponding to the unknown frequency period, and the output frequency division ratio N directly represents the angular position (e.g., 360 for full rotation). This substitution eliminates complex trigonometric computations while maintaining angular measurement accuracy, significantly reducing computational latency.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Measurement precision

If a single high-resolution counter is used, then measurement precision improves, but the counter width and hardware requirements increase

Engineering Contradiction:
Improveperiod measurement precisionVSAvoidcounter width
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The measurement function is segmented between two counters with moderate resolution rather than one counter with very high resolution. The first counter measures the period with sufficient precision for the application, and the second counter handles the frequency division with a fixed ratio N. This segmentation allows both counters to use reasonable bit widths, avoiding the need for a single extremely wide counter while maintaining overall measurement precision.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP2972411B1Digital period divider and method of operating the same
Publication Date: 2021.09.15 MICROCHIP TECHNOLOGY INC
  • EP2972411B1 patent drawingFigure 1~5
  • EP2972411B1 patent drawingFigure 2
  • EP2972411B1 patent drawingFigure 3

AI summary

A digital period divider has a first counter with R least significant bits (LSB) and P most significant bits (MSB) having a count input and a reset input, wherein the count input receives a first clock signal and the reset input receives a second clock signal; a latch having P bits and being coupled with the P bits of the first counter; a second counter having P bits and a count input and a reset input, wherein the count input receives the first clock signal; and a first comparator operable to compare the P bits of the latch with the P bits of the second counter and generating an output signal, wherein the output signal is also fed to the reset input of the second counter.