Distributed Digital Phase Interpolator for Lower Load and Better Linearity
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Solution Overview
Problem
Traditional phase interpolators require a large number of inverters for higher accuracy, leading to increased input load, power consumption, and area, which hinders their efficiency and linearity.
Innovation Solution
A digital phase interpolator that performs pre-interpolation followed by quadratic interpolation, reducing the number of stages and input load while improving linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional phase interpolators use more inverters for higher accuracy interpolation, then the interpolation precision is improved, but the input load and power consumption increase
Solution Approach 1:
The phase interpolator is divided into multiple stages: a first phase interpolating stage with fewer inverters and a second phase interpolating stage with more inverters. The first stage performs coarse interpolation to reduce the phase difference between input signals, while the second stage performs fine interpolation. This segmentation allows high precision without requiring all inverters to operate at full capacity simultaneously, reducing overall power consumption.
Solution Approach 2:
The first phase interpolating stage performs preliminary interpolation on the input signals before they enter the second stage. By pre-reducing the phase difference and signal amplitude, the preliminary action reduces the workload and power consumption requirements for the second stage, achieving high precision with lower overall power consumption.
2Measurement precision
If traditional phase interpolators use more inverters for higher accuracy interpolation, then the interpolation precision is improved, but the area occupied by the interpolator increases
Solution Approach 1:
The interpolator is segmented into multiple stages with different numbers of inverters. The first stage uses fewer inverters for coarse interpolation, and the second stage uses more inverters for fine interpolation. This segmentation reduces the total number of inverters needed compared to a single high-precision stage, thereby reducing the overall area occupied by the interpolator.
Solution Approach 2:
The first phase interpolating stage performs partial interpolation (coarse interpolation) that reduces but does not eliminate the phase difference. This partial action is sufficient to reduce the requirements for the second stage, achieving high overall precision with fewer total inverters and reduced area.
3Measurement precision
If traditional phase interpolators use more inverters for higher accuracy interpolation, then the interpolation precision is improved, but the input load increases
Solution Approach 1:
The input signal processing is segmented into two stages. The first stage processes the input signals with fewer inverters, reducing the phase difference and signal amplitude. This segmentation reduces the input load requirement for the second stage, as it receives pre-conditioned signals with smaller amplitude and reduced phase difference.
Solution Approach 2:
The first phase interpolating stage performs preliminary processing on the input signals, reducing their amplitude and phase difference before they enter the second stage. This preliminary action reduces the input load complexity for subsequent stages, as the signals are already partially processed and have reduced energy requirements.
Data Source
AI summary
The application relates to the field of integrated circuit design and discloses a digital phase interpolator, comprising: a first delay unit, a pre-interpolating unit, a second delay unit, and a phase interpolating unit; wherein each interpolation branch comprises a pre-interpolating unit and a re-interpolating unit. For two input signals with preset phase differences, the digital phase interpolator performs two interpolation processes, one at the pre-interpolating unit and the other at the phase interpolating unit. This distributed quadratic interpolation reduces the task of the phase interpolation unit, helps to reduce the number of stages of the phase interpolating unit, reduces the input load, reduces the overall power consumption and the overall area, ensures the rationality of its own power consumption, and improves the linearity of phase interpolation to some extent.


