Digital Phase Synchronization Using One-Bit Quantized PSK Signals
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Solution Overview
Problem
Current carrier wave recovery techniques face challenges in reducing circuit size and cost, achieving accurate phase synchronization, and minimizing power consumption, particularly in wireless communication systems using phase shift keying (PSK) modulation.
Innovation Solution
A phase synchronization device that samples a phase-modulated continuous-time signal to generate a quantized signal, using a sampling filter and one-bit quantizer to detect the reference phase in a digital signal region, with a synchronization section that calculates phase differences and adjusts the inspection signal timing to synchronize with the quantized signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog carrier wave recovery techniques are used to achieve accurate phase synchronization, then phase synchronization accuracy is improved, but circuit size and cost increase due to complex analog circuits
Solution Approach 1:
The patent replaces the mechanical/analog carrier wave recovery system with a digital signal processing system. Specifically, it substitutes analog mixers, local oscillators, and analog phase detectors with digital components including an A/D converter, digital signal processor, and digital phase synchronization algorithm. This substitution maintains phase synchronization accuracy while significantly reducing circuit complexity and component count.
Solution Approach 2:
The patent changes the operational domain from analog to digital by introducing an A/D converter that samples the received signal at a frequency at least twice the symbol rate. This parameter change enables the use of digital signal processing techniques for carrier wave recovery, transforming the system from analog-based to digital-based operation while preserving synchronization performance.
2Measurement precision
If high-resolution A/D converters are used to improve signal processing accuracy, then demodulation accuracy is improved, but power consumption increases
Solution Approach 1:
The patent applies partial action by using a low-resolution A/D converter (one-bit quantizer) that only captures the sign of the sampled signal rather than its full amplitude information. This partial sampling approach is sufficient for phase synchronization and demodulation when combined with the digital signal processing algorithm, significantly reducing power consumption while maintaining adequate demodulation accuracy for PSK modulation schemes.
3Reliability
If analog filtering circuits are used to remove noise from reception signals, then signal-to-noise ratio is improved, but circuit size and power consumption increase
Solution Approach 1:
The patent substitutes physical analog filtering circuits with digital filtering algorithms implemented in the signal processing unit. The digital filter processes the quantized signal to remove noise and interference, achieving the same signal-to-noise ratio improvement as analog filters but with significantly reduced power consumption and eliminated need for additional analog components.
Data Source
AI summary
A sampling section (100A) includes a sampling filter (102) that converts a continuous-time signal into a discrete-time signal and applies filtering of low-pass characteristics and a one-bit quantizer (107) that outputs a quantized signal representing a time-dependent change in the discrete-time signal. A synchronization section (100B) includes a phase difference detector (110) that calculates the phase difference between an inspection signal and the quantized signal and a delay control circuit (114) that feeds back the inspection signal to the phase difference detector at the timing set in consideration of a delay amount corresponding to the phase difference. When the phase difference between the inspection signal and the current quantized signal shows the same phase, the phase of the inspection signal is detected as a reference phase.