Reconfigurable Digital PLL for Wideband Carrier Acquisition
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Solution Overview
Problem
Radio frequency (RF) communication receivers require a wide acquisition range for RF carrier frequency due to uncertainty in frequency allocation and transmission standards, leading to increased costs and die area in semiconductor solutions, as different circuitry is needed for channel acquisition and carrier tracking.
Innovation Solution
A re-configurable phase lock loop (PLL) with both feedforward and feedback loop configurations to perform wideband carrier frequency acquisition and narrowband tracking, sharing hardware components to reduce implementation costs and die area, and a digital signal processor (DSP) with a demodulator to handle frequency translation and overmodulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If different circuitry is used for channel acquisition and carrier tracking, then wide acquisition range and narrow tracking range are achieved, but device complexity and die area increase
Solution Approach 1:
The patent implements a single PLL circuit that can operate in multiple modes: wideband acquisition mode and narrowband tracking mode. The same hardware components (VCO, phase detector, loop filter) are reused for both functions by reconfiguring the signal path and control parameters, eliminating the need for separate acquisition and tracking circuitry.
Solution Approach 2:
The PLL system dynamically reconfigures its bandwidth and operating characteristics based on the current task. During acquisition, the loop bandwidth is widened to track large frequency offsets; during tracking, the bandwidth is narrowed to improve phase noise performance. This dynamic adaptation allows one circuit to perform multiple functions.
2Adaptability or versatility
If different circuitry is used for channel acquisition and carrier tracking, then both tasks are performed, but die area increases
Solution Approach 1:
The patent merges the acquisition and tracking functions into a single integrated PLL circuit. By combining the VCO, phase detector, loop filter, and control logic into one unified structure that can be reconfigured for different tasks, the die area is significantly reduced compared to having separate dedicated circuits for each function.
Solution Approach 2:
The same hardware blocks are designed to serve dual purposes: the phase detector operates in both acquisition and tracking modes, the loop filter adapts its bandwidth, and the VCO frequency range is adjusted. This universal design approach minimizes the total component count and die area while maintaining full functionality.
3Reliability
If a narrowband PLL is used for carrier tracking, then noise performance is improved, but acquisition range is limited
Solution Approach 1:
The PLL bandwidth is made dynamic rather than fixed. During the acquisition phase, the loop bandwidth is widened to allow the PLL to acquire signals with large frequency offsets. Once acquisition is complete and the frequency offset is reduced, the bandwidth is narrowed to improve noise performance during the tracking phase. This temporal separation of bandwidth characteristics resolves the contradiction.
Solution Approach 2:
The system operates in periodic stages: first acquisition mode with wide bandwidth, then transition to tracking mode with narrow bandwidth. This periodic switching of operational modes allows the system to achieve both wide acquisition range and good noise performance at different times in the signal processing sequence.
Data Source
AI summary
In various implementations, a re-configurable phase lock loop may have multiple signal paths, including a feedforward path to operate in a carrier frequency acquisition mode to obtain a carrier frequency estimate and a feedback loop path to operate in a carrier frequency tracking mode to translate an incoming signal to a baseband signal. The multiple signal paths may share most of the hardware to reduce implementation cost.