Digital PLL Clock Selection for Spurious-Resistant RF Processing
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Solution Overview
Problem
In wireless communication systems, particularly in mobile phones, the use of digital type PLL circuits can lead to spurious signals that interfere with communication quality, especially when multiple frequency bands are supported, causing noise in the receiving signal due to overlapping spurious frequencies and transmission modulation signals.
Innovation Solution
A high-frequency signal processing device is designed with a digital phase comparator unit, digital filter unit, digital control oscillator unit, and frequency divider unit, which selects an appropriate clock frequency for the digital filter to minimize the influence of spurious signals by setting the digital low-pass filter clock frequency in accordance with the frequency band used, thereby reducing interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a digital type PLL circuit is used in the high-frequency signal processing unit, then the area and power consumption are reduced and performance is improved, but spurious signals are generated that interfere with communication quality
Solution Approach 1:
The patent changes the clock frequency parameter of the digital low-pass filter to resolve spurious signal interference. By selecting an appropriate clock frequency that creates a frequency gap between the spurious signal and the transmission modulation signal, the harmful interaction is avoided while maintaining the benefits of the digital PLL circuit.
2Device complexity
If the digital low-pass filter clock frequency is fixed, then the circuit design is simplified, but spurious signals cannot be avoided when supporting multiple frequency bands
Solution Approach 1:
The patent makes the clock frequency of the digital low-pass filter dynamic rather than fixed. The clock frequency is changed according to the selected frequency band to ensure that the spurious signal does not overlap with the transmission modulation signal. This dynamic adjustment resolves the contradiction by adapting the filter parameters to different operating conditions.
3Object-generated harmful factors
If additional filters like SAW filters are added to reduce spurious signals, then communication quality is improved, but the device area and cost increase
Solution Approach 1:
The patent replaces the need for additional physical filters (such as SAW filters) with a digital signal processing approach. By carefully selecting the clock frequency of the digital low-pass filter, the spurious signal interference is avoided through frequency domain separation rather than physical filtering. This substitution eliminates the need for additional hardware components while achieving the same goal of reducing spurious signal impact.
Data Source
AI summary
To reduce the influence of a spurious in a high-frequency signal processing device and a wireless communication system each provided with a digital type PLL circuit. In a digital type PLL circuit including a digital phase comparator unit, a digital low-pass filter, a digital control oscillator unit, and a multi-module driver unit (frequency divider unit), the clock frequency of a clock signal in the digital phase comparator unit is configured selectably among a plurality of options. The clock frequency is selected among frequencies which are integer multiples of a reference frequency, in accordance with which frequency band of a standard is to be set for an oscillation output signal of the digital control oscillator unit.