Digital PLL Test Circuit With On-Chip Feedback Diagnostics
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Solution Overview
Problem
The characterization and diagnostics of digital phase-locked loops (DPLLs) embedded in integrated circuits require complex lab equipment, limiting production testing to basic functionality and making comprehensive testing and optimization challenging.
Innovation Solution
Incorporating a DPLL Diagnostics Circuit (DPLL-DC) with an oscillator, digital phase detector, and digital feedback bus, which monitors events, accumulates data, detects extremum values, and counts time durations, enabling full-bandwidth diagnostics and communication channel demodulation for phase-modulated and frequency-modulated data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If comprehensive testing and characterization of DPLLs is performed using traditional lab equipment, then measurement precision and diagnostic capability are improved, but device complexity and testing cost increase significantly
Solution Approach 1:
The patent extracts the essential diagnostic functions from complex external lab equipment and implements them as integrated on-chip circuits. The DPLL-DC includes event detection circuitry, accumulators, and histogram logging capabilities that were previously requiring separate laboratory instruments, thereby reducing external testing complexity while maintaining measurement precision.
Solution Approach 2:
The DPLL circuit performs self-diagnostics through the integrated DPLL-DC that monitors its own operation parameters. The system characterizes its own performance by detecting events on the digital feedback bus, accumulating statistical data, and logging histograms without requiring external testing equipment, thus eliminating the need for complex external measurement systems.
2Productivity
If basic functionality testing only is performed during production, then productivity is improved, but measurement precision and reliability of DPLL performance deteriorate
Solution Approach 1:
The patent implements comprehensive diagnostic capabilities that are built into the DPLL circuit during manufacturing, allowing full-bandwidth event monitoring and statistical characterization to be performed as part of the standard production process. This preliminary integration of advanced testing functions enables precise performance measurement without adding separate testing steps, thereby maintaining high productivity while achieving comprehensive characterization.
3Reliability
If additional diagnostic circuitry is added to the DPLL, then measurement precision and diagnostic capability are improved, but device complexity increases
Solution Approach 1:
The patent merges the diagnostic functions with the existing DPLL circuitry by having the DPLL-DC monitor events on the digital feedback bus that already exists in the DPLL structure. The event detection circuitry, accumulators, and histogram logging are integrated into the same chip and share resources with the main DPLL operation, reducing overall device complexity compared to separate diagnostic systems.
Solution Approach 2:
The DPLL-DC is designed as a multi-functional diagnostic unit that can perform event detection, statistical accumulation, histogram logging, and parameter characterization simultaneously. This universal diagnostic circuit handles multiple measurement tasks through a single integrated structure, reducing the need for separate specialized circuits and thereby limiting the increase in device complexity.
Data Source
AI summary
An Integrated Circuit (IC) includes a digital phase-locked loop (DPLL) circuit and DPLL Diagnostics circuitry (DPLL-DC). The DPLL circuit includes an oscillator, a digital phase detector and a digital feedback bus (DPLL-DFB). The oscillator is configured to generate an output signal. The digital phase detector is configured to generate a digital feedback signal indicative of a phase difference between the output signal and a reference input signal. The DPLL-DFB is configured to feed-back the digital feedback signal for controlling the oscillator. The DPLL-DC is coupled to the DPLL-DFB and is configured to monitor events depending at least on the digital feedback signal transferred on the DPLL-DFB.