Digital PLL Oscillator Modeling for Fast Variable Frequency Tracking
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Solution Overview
Problem
Existing digital phase locked loops (DPLLs) face limitations in rapidly tracking changes in frequency, particularly in applications requiring high response rates due to their bandwidth constraints, which can be a challenge when dealing with variable frequency input signals.
Innovation Solution
An all-digital phase locked loop system that includes a digitally controlled oscillator with a model representing its behavior as a function of frequency, using control signals to adjust the oscillator's frequency to match a target frequency, and incorporating a filter to modify the output signal and control the oscillator, allowing for coarse, moderate, and fine control of frequency adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a traditional digital phase locked loop is used, then the system structure is simple, but the response rate is slow and cannot rapidly track frequency changes
Solution Approach 1:
The patent applies preliminary action by pre-characterizing the digitally controlled oscillator's frequency behavior across its tuning range during manufacturing or calibration. This creates a lookup table or model that predicts frequency deviations before they occur, allowing the system to pre-compensate for non-linearities and rapidly track frequency changes without complex real-time calculations.
Solution Approach 2:
The patent introduces an intermediary frequency compensation mechanism that sits between the phase detector and the digitally controlled oscillator. This intermediary component uses the pre-characterized oscillator model to generate compensation signals that correct frequency deviations, enabling fast tracking without directly modifying the core PLL structure.
2Speed
If the bandwidth of the control loop is increased to improve response rate, then the tracking speed improves, but the stability and filtering performance deteriorates
Solution Approach 1:
The patent segments the frequency control function into two parts: a wide-band component for fast frequency acquisition and a narrow-band component for stable phase tracking. This is achieved by separating the frequency adjustment into coarse (fast) and fine (stable) stages, allowing the system to achieve both rapid tracking and stable operation without compromising either performance metric.
Solution Approach 2:
The patent implements dynamic bandwidth adjustment where the control loop bandwidth is adaptively modified based on the tracking requirements. During frequency transitions, the bandwidth is increased for fast response, and during steady-state operation, the bandwidth is reduced for enhanced stability and noise filtering. This dynamic adaptation resolves the contradiction between speed and stability.
Data Source
AI summary
An all digital phase locked loop system for tracking a variable frequency input signal and method of operation are described. The ADPLL system includes a digital phase locked loop, including a digitally controlled oscillator, and a model of the digitally controller oscillator. The model represents the behaviour of the digitally controlled oscillator as a function of frequency and has a model input arranged to receive a signal indicating a current target frequency. The model is configured to output at least one control signal to control the frequency of the digitally controlled oscillator to be closer to the current target frequency. The digital phase locked loop is configured to control the digitally controlled oscillator to reduce any difference between the frequency of the digitally controlled oscillator and the current target frequency arising from any deviation of the model of the digitally controlled oscillator from the digitally controlled oscillator.