Digital PLL Holdover Control for Continuous Oscillation

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Solution Overview

Problem

Existing digital PLL circuits cannot maintain oscillation in a holdover state when the reference signal is absent or defective, leading to a loss of operation.

Innovation Solution

A circuit device with an oscillation signal generation circuit and a processing circuit that includes a counter and a latch circuit, capable of performing count processes and holding count values based on a reference signal, allowing the circuit to generate frequency control data for free-running oscillation during holdover periods and recover smoothly when the reference signal returns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the latch circuit latches the count value only when the reference signal is present, then the PLL circuit can maintain phase synchronization during normal operation, but the oscillator stops operating when the reference signal is absent or defective

Engineering Contradiction:
Improveoscillation continuityVSAvoidholdover operation capability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The latch circuit dynamically changes its operation mode based on the presence or absence of the reference signal. When the reference signal is present, it latches the count value at the rising edge to maintain phase synchronization. When the reference signal is absent or defective, it switches to holding the last latched count value, enabling the oscillator to continue operating in holdover mode without stopping

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the operational parameters of the latch circuit based on the reference signal status. By detecting reference signal absence or defects, the system transitions from synchronous latching mode to holdover mode, where the latch circuit maintains the last valid count value, allowing the oscillator to continue generating output with preserved phase relationship

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If the counter continues counting during holdover period, then the phase relationship can be maintained, but the latch circuit cannot update the count value without a reference signal edge

Engineering Contradiction:
Improvephase relationship consistencyVSAvoidcount value update capability
Core Design Contradiction:
Stability of the object's compositionVSLoss of information

Solution Approach 1:

The latch circuit performs preliminary latching of the count value before the reference signal is lost. Once latched, this count value is held and maintained during the holdover period, preserving the phase relationship information even though no new count values can be acquired without the reference signal

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The latch circuit creates a copy of the count value at the moment of latching and maintains this copied value during holdover. This copied count value represents the phase relationship at the time of latching and continues to be used for frequency control, effectively preserving the phase information without requiring continuous reference signal input

Inventive Principle:
Principle #26Copying

Data Source

PatentUS10686457B2Circuit device, oscillator, electronic apparatus and vehicle
Publication Date: 2020.06.16 SEIKO EPSON CORP
  • US10686457B2 patent drawing
  • US10686457B2 patent drawing
  • US10686457B2 patent drawing

AI summary

A circuit device includes an oscillation signal generation circuit for generating an oscillation signal with an oscillation frequency set by frequency control data, and a processing circuit. The processing circuit includes a counter for performing a count process based on the oscillation signal, and a latch circuit for holding a count value of the counter based on a reference signal. The processing circuit performs a loop filter process on a phase comparison result based on output data of the latch circuit to output the frequency control data, holds information based on the phase comparison result when the holdover is detected, and outputs the frequency control data based on the information held, in a holdover period.