Digital PLL PWM Clocking With Sinc-Comb Jitter Suppression
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Solution Overview
Problem
Conventional phase-locked loop circuits in digital audio systems suffer from significant phase jitter in the master clock signal, leading to noise energy in the audio band and a loss of dynamic range, requiring costly external passive components and inefficient analog implementations.
Innovation Solution
An all-digital phase-locked loop circuit with a digitally controlled oscillator incorporating combined sinc and comb filters, which suppresses phase jitter and eliminates the need for external passive components, using a simple first-order digital filter and digitally controlled delay cells to generate a high-frequency PWM clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional analog phase-locked loop circuits are used, then the circuit can generate PWM clock signals, but significant phase jitter occurs leading to noise energy in the audio band and loss of dynamic range
Solution Approach 1:
The patent replaces the analog phase-locked loop circuit with an all-digital implementation. The analog voltage-controlled oscillator and loop filter are substituted with digitally controlled delay cells and a digital filter, eliminating the phase jitter inherent in analog circuits while maintaining the PWM clock generation function.
Solution Approach 2:
The patent changes the operating domain from analog to digital by implementing phase detection, filtering, and oscillator control entirely in the digital domain. This parameter change from continuous analog signals to discrete digital signals fundamentally resolves the phase jitter issue while preserving audio fidelity.
2Reliability
If analog implementations with external passive components are used, then phase jitter can be filtered, but the system becomes costly and complex
Solution Approach 1:
The patent merges the loop filter function with the digital control logic of the oscillator. The digital filter is integrated within the all-digital phase-locked loop circuit, eliminating the need for separate external passive components while maintaining effective phase noise filtering.
Solution Approach 2:
External passive analog components are replaced with digital circuitry. The analog loop filter is substituted with a digital filter implemented in the digital domain, eliminating the need for physical resistors, capacitors, and inductors while achieving superior filtering performance.
3Speed
If high-frequency PWM clock signals are generated, then digital audio processing speed improves, but phase jitter effects are amplified
Solution Approach 1:
The patent generates high-frequency PWM clock signals using an all-digital oscillator composed of digitally controlled delay cells. This digital implementation avoids the phase jitter amplification that occurs in analog systems at high frequencies, enabling fast switching speeds without compromising signal quality.
Solution Approach 2:
The patent transitions the oscillator implementation from analog to digital, changing the fundamental parameter domain. This allows high-frequency operation with superior phase jitter suppression because digital circuits do not suffer from the same jitter amplification issues as analog VCOs at high frequencies.
Data Source
AI summary
A digital audio system including a digital phase-locked-loop circuit for generating a pulse-width-modulation (PWM) clock signal, applied to a pulse-code-modulation to pulse-width-modulation converter, is disclosed. The digital phase-locked loop includes a phase detector for measuring phase error between a reference signal and a feedback signal. A digital version of the phase error, after filtering by a loop filter, is converted to a digital delay control word that is sampled at twice its frequency. Successive samples of the delay control word control the propagation delay of first and second delay cells in an oscillator. The use of successive samples at substantially twice the frequency of change of the delay control word effectively realizes the sum of a sinc filter and a comb filter, which greatly suppresses the effects of jitter in the reference signal to the digital phase-locked loop.