Digital PLL Phase Control Without Delta-Sigma Noise
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Solution Overview
Problem
Existing phase locked loop (PLL) designs in hard disk drives face challenges with power consumption and phase accuracy, particularly when handling bit-patterned-media, and are plagued by noise sources associated with delta-sigma modulation and phase mixers.
Innovation Solution
The implementation of a digital phase locked loop circuit with a digitally controlled oscillator, feedback circuitry, and comparison circuitry that generates a phase error value to control the clock signal frequency, eliminating delta-sigma modulation and phase mixers, and utilizing a fractional feedback counter for precise phase detection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If traditional phase locked loop designs are used, then the system can operate with conventional circuitry, but power consumption increases and noise sources are introduced
Solution Approach 1:
The patent replaces traditional analog PLL components (phase mixers, delta-sigma modulators) with digital circuitry. The digitally controlled oscillator and digital feedback mechanisms eliminate the need for analog mixing and modulation circuits, thereby reducing power consumption while maintaining phase accuracy through digital signal processing and feedback control algorithms.
Solution Approach 2:
The patent changes the operating parameters by using digital control words to adjust the oscillator frequency and phase directly, rather than using analog voltage control. This digital parameter control reduces power consumption and eliminates the noise associated with analog components while maintaining precise phase and frequency control through programmable parameters.
2Measurement precision
If delta-sigma modulation and phase mixers are used, then frequency control is achieved, but noise sources increase
Solution Approach 1:
The patent extracts and removes the noisy components (phase mixers and delta-sigma modulators) from the system. By eliminating these analog components, the design achieves phase accuracy through digital feedback mechanisms without introducing the noise that would be generated by traditional analog mixing and modulation circuits.
Solution Approach 2:
The patent substitutes digital logic circuits for the analog phase mixers and delta-sigma modulators. The digital feedback loop directly compares phase information and generates control signals without requiring analog mixing operations, thereby achieving precise phase measurement and control while eliminating the noise sources inherent in analog signal processing.
3Device complexity
If analog circuitry is used for phase detection, then continuous phase information is obtained, but device complexity and power consumption increase
Solution Approach 1:
The patent replaces analog phase detection circuitry with digital phase detection mechanisms. The digitally controlled oscillator and digital feedback loop use discrete digital signals to represent and compare phase information, reducing circuit complexity while maintaining measurement precision through digital signal processing and feedback control algorithms.
Data Source
AI summary
An apparatus comprises digitally controlled oscillator circuitry, feedback circuitry operatively coupled to the digitally controlled oscillator circuitry, and comparison circuitry operatively coupled to the digitally controlled oscillator circuitry and the feedback circuitry. The feedback circuitry, in response to a clock signal generated by the digitally controlled oscillator circuitry, generates a first digital value representing a detected phase of the clock signal for a given clock signal cycle. The comparison circuitry, in response to the first digital value and to a second digital value representing a reference phase, generates a phase error value. The phase error value is useable to generate a first digital control word provided to the digitally controlled oscillator circuitry for controlling a frequency associated with the clock signal. The digitally controlled oscillator circuitry further comprises adjustment circuitry capable of applying a phase adjustment to the clock signal in response to a second digital control word.


