Digital PLL Minute Phase Error Detection for Fractional Frequency Control

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Solution Overview

Problem

Conventional digital PLL circuits face challenges in achieving excellent phase noise characteristics when the frequency command word contains a fractional component, leading to increased area and power consumption due to the need for a large time-to-digital converter with an inverter chain.

Innovation Solution

The digital PLL circuit calculates a minute phase error using amplitude information of the reference signal, reducing the number of comparators by setting threshold values close to the amplitude values, thereby reducing area and power consumption while maintaining excellent phase noise characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional time-to-digital converter with an inverter chain is used to calculate minute phase error, then phase noise characteristics are improved, but circuit area and power consumption increase significantly

Engineering Contradiction:

Improvephase noise characteristicsVSAvoidcircuit area

Core Design Contradiction:

Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent changes the parameter used for phase error measurement from time-based (inverter chain delay) to amplitude-based (reference signal amplitude). By detecting the amplitude of the reference signal at specific timing points and comparing it with threshold values, the system achieves minute phase error calculation without requiring a large inverter chain, thus improving phase noise characteristics while reducing circuit area

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent replaces the mechanical/time-based measurement system (inverter chain with delay lines) with an amplitude-based detection system. Instead of measuring time differences through physical signal propagation delays in an inverter chain, the system uses amplitude comparison of the reference signal, which eliminates the need for extensive inverter chains and reduces circuit area while maintaining measurement precision

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Measurement precision

If a conventional time-to-digital converter with an inverter chain is used to calculate minute phase error, then phase noise characteristics are improved, but power consumption increases significantly

Engineering Contradiction:

Improvephase noise characteristicsVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by stationary object

Solution Approach 1:

The patent changes the measurement parameter from time (requiring continuous operation of inverter chains) to amplitude (detected at specific sampling points). This parameter change allows phase error measurement without continuously driving large inverter chains, significantly reducing power consumption while maintaining the ability to calculate minute phase errors for excellent phase noise characteristics

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent substitutes the energy-intensive time-based measurement mechanism (inverter chain operation) with an amplitude-based detection mechanism. By sampling the reference signal amplitude at specific timing points and comparing with thresholds, the system achieves accurate phase error measurement without the continuous power consumption required by inverter chains, thus improving power efficiency while maintaining phase noise performance

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

3Adaptability or versatility

If the frequency command word contains a fractional component, then frequency multiplication flexibility is improved, but residual phase error increases and degrades phase noise characteristics

Engineering Contradiction:

Improvefrequency multiplication flexibilityVSAvoidphase error accuracy

Core Design Contradiction:

Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent changes the approach to handling fractional frequency multiplication by using amplitude-based phase error measurement instead of time-based measurement. This allows the system to accurately measure phase errors even when the frequency command word contains fractional components, maintaining phase noise characteristics while enabling flexible frequency multiplication ratios

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where the detected amplitude of the reference signal is continuously compared with threshold values, and the phase error information is fed back to adjust the timing or parameters. This feedback loop enables accurate phase error measurement and correction even with fractional frequency multiplication, maintaining measurement precision while providing frequency flexibility

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS8780974B2Digital PLL circuit and communication device

Publication Date: 2014.07.15 PANASONIC HOLDINGS CORP

AI summary

In a digital PLL circuit outputting a clock signal with a frequency obtained by multiplying a frequency of a reference signal by a frequency command word (a frequency ratio), an RPA serially adds a frequency command word containing a fractional component. An output of the RPA is input to a minute phase error generator. The phase error generator generates a plurality of threshold values close to an actual amplitude value of the reference signal based on the fractional portion of the serially added value of the frequency command word, calculates the amplitude value of the reference signal and a phase error of the reference signal corresponding to the amplitude value based on the threshold values, and calculates a minute phase error between the reference signal and the output clock.