Digital PLL Phase-Vector Control for 1 Hz Frequency Stability
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Solution Overview
Problem
Conventional PLL circuits face challenges in achieving extremely high frequency stability required for advanced applications like base stations, where a frequency resolution of 1 Hz or lower is needed, due to difficulties in maintaining high accuracy of the reference clock signal.
Innovation Solution
A PLL apparatus that includes a voltage-controlled oscillation unit, an analog/digital conversion unit, an orthogonal transformation unit, an angular velocity calculation unit, and a pulse width modulation unit to control the oscillation based on the calculated angular velocity, allowing for precise adjustment of the phase difference between the frequency signal and the standard signal, thereby achieving high frequency stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional PLL circuit is used to generate a reference clock signal, then the circuit structure is simple and easy to implement, but the frequency stability cannot achieve the required 1 Hz or lower resolution for advanced applications
Solution Approach 1:
The patent replaces the conventional analog PLL circuit with a digital signal processing-based system. The phase detection is performed using digital correlation processing instead of analog phase detectors, and the loop filter is implemented as a digital filter. This substitution enables achieving 1 Hz or better frequency stability while maintaining reasonable system complexity through software-based control algorithms.
Solution Approach 2:
The patent changes the operating parameters of the PLL system by using high-precision digital counters to measure phase differences with resolutions corresponding to 1 Hz or lower frequency deviations. The system employs high-order digital filters with optimized time constants to achieve both high frequency stability and fast acquisition, resolving the contradiction between precision and complexity through parameter optimization.
2Measurement precision
If the frequency resolution is increased to 1 Hz or lower, then the frequency stability is improved, but the acquisition time and lock time of the PLL circuit increase significantly
Solution Approach 1:
The patent implements a dual-mode operation system that dynamically switches between acquisition mode and tracking mode. During acquisition, the system uses a wide bandwidth loop filter for fast frequency acquisition. Once locked, it transitions to tracking mode with a narrow bandwidth filter for high-frequency stability. This dynamic adaptation resolves the time-stability contradiction by optimizing performance for each operational phase.
Solution Approach 2:
The system performs preliminary frequency coarse-adjustment using a frequency synthesizer before engaging the high-precision PLL tracking loop. This preliminary action brings the VCO frequency close to the target frequency, reducing the burden on the high-resolution phase detector and enabling faster overall acquisition time while maintaining 1 Hz resolution capability.
3Measurement precision
If a standard signal from cesium or rubidium oscillators is distributed to multiple base stations, then the frequency reference stability is improved, but the system cost increases due to the expensive standard oscillators
Solution Approach 1:
The patent creates a local copy of the frequency reference function by using a temperature-compensated or oven-controlled crystal oscillator (TCXO/OCXO) combined with digital PLL processing to replicate the stability characteristics previously requiring expensive cesium or rubidium standards. The digital signal processing algorithms compensate for local oscillator imperfections, enabling cost-effective deployment at individual base stations without requiring centralized distribution of atomic clock signals.
Data Source
AI summary
Provided is a PLL apparatus realizing extremely high frequency stability. As a concrete means for solving the problem, an A/D (analog/digital) conversion unit samples a standard signal based on 40 MHz frequency signal, which is a rectangular wave, from an oven controlled crystal oscillator (OCXO), and an orthogonal transformation unit applies orthogonal transformation to a digital signal from the A/D conversion unit to extract a real part (I) and an imaginary part (Q) which are complex expression of a phase vector equivalent to a phase difference between the standard signal and the frequency signal from the OCXO. An angular velocity of this vector is detected and a direct-current voltage according to the angular velocity is generated and supplied to the OCXO via a PWM control unit.