Digital PLL Pulse-Capacitance Tuning for Low-Jitter LC Tanks
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Solution Overview
Problem
Existing phase-locked loops (PLLs) face challenges in improving low jitter, narrow lock range, and high manufacturing costs due to the use of varactors, which are susceptible to supply noise and temperature variations, affecting the quality factor of LC tanks.
Innovation Solution
A digital phase-locked loop utilizing pulse signal-based variable capacitance, replacing varactors with a capacitor bank, to adjust frequency and phase by controlling capacitance through a phase detector, digital loop filter, and digitally controlled oscillator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a varactor is used as a variable capacitor in an LC tank oscillator, then frequency tuning is achieved, but the quality factor of the LC tank deteriorates due to supply noise and temperature variations
Solution Approach 1:
The patent divides the capacitance control into multiple discrete capacitor units (first capacitor, second capacitor, third capacitor, fourth capacitor) that can be independently controlled. This segmentation allows precise capacitance adjustment without using a varactor, thereby maintaining high quality factor while achieving frequency tuning capability.
Solution Approach 2:
The patent changes the control parameter from voltage-based (varactor) to digital signal-based (phase detector output). By using digital control signals to switch capacitor connections, the system achieves frequency tuning without the analog vulnerabilities of varactors to noise and temperature, thus maintaining reliability.
2Ease of operation
If a charge pump is used in a phase-locked loop, then phase adjustment is possible, but structural complexity increases making low jitter improvement difficult
Solution Approach 1:
The patent extracts and removes the charge pump component from the PLL structure, replacing it with a digital control mechanism that directly adjusts the oscillator frequency and phase. This simplification eliminates the structural complexity of the charge pump while maintaining phase adjustment capability through digital control.
Solution Approach 2:
The patent replaces the mechanical/electrical charge pump mechanism with a digital control system. The phase detector and digital control logic substitute for the charge pump's function, reducing structural complexity while achieving the same phase adjustment objective through digital rather than analog means.
3Productivity
If a sampling PLL is used for high-speed data processing, then data rate increases, but lock range becomes narrow requiring additional loops that increase manufacturing cost
Solution Approach 1:
The patent implements dynamic frequency and phase adjustment capabilities through the phase detector and digitally controlled oscillator. This dynamic control allows the system to maintain a wide lock range while operating at high data rates, eliminating the need for additional frequency locking loops and reducing manufacturing costs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves power supply rejection ratio (PSRR), reduces jitter, stabilizes frequency against temperature changes, and enhances the quality factor of the LC tank, thereby improving the quality of service (QoS).
Implementation Method 1
a capacitor bank circuit configured to change a first capacitance based on the capacitance control signal
Implementation Method 2
a digitally controlled oscillator including: an inductor, a capacitor bank circuit configured to change a first capacitance based on the capacitance control signal, and a negative voltage-current converter configured to output an output signal having a phase adjusted based on inductance of the inductor and an average of the first capacitance during the first period
Data Source
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AI summary
Provided are a digital phase-locked loop for tuning a frequency and correcting a phase error by using pulse signal-based variable capacitance, an electronic device, and a method of operating the digital phase-locked loop. The digital phase-locked loop includes a phase detector for comparing phases between a reference signal and a feedback signal, a digital loop filter for outputting an adjustment signal that regulates a duty ratio for a first period, based on an up-down signal of the phase detector, a variable capacitance controller for outputting a capacitance control signal having the duty ratio, based on the feedback signal, the adjustment signal, and the up-down signal, a digitally controlled oscillator for changing first capacitance of a capacitor bank circuit, based on the capacitance control signal, and adjusting a phase based on an average of the first capacitance during the first period, and a divider for dividing an output signal.