Digital PLL Frequency Control With a Three-State Phase Detector
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional digital phase-locked loops require multiple bits to convert analog phase difference values into digital information, increasing circuit complexity and cost due to the need for a phase/frequency analog-to-digital converter.
Innovation Solution
A digital phase-locked loop with a three-state phase frequency detector, a three-state phase frequency detection converter, a loop filter, and a digital voltage-controlled oscillator, which outputs a three-state signal (1, 0, -1) based on the phase difference between input and reference frequencies, allowing for frequency adjustment using only one control bit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a phase/frequency analog-to-digital converter is used to convert analog phase difference values into digital information, then the digital phase-locked loop can process digital signals, but the circuit complexity and cost increase due to requiring multiple bits for conversion
Solution Approach 1:
The patent extracts only the essential phase difference information needed for frequency adjustment, representing it with a simplified three-state output (1, 0, -1) instead of converting the complete analog phase difference value into multi-bit digital information. This selective extraction maintains digital processing capability while eliminating the complexity of full analog-to-digital conversion.
Solution Approach 2:
The patent changes the parameter representation of phase difference from multi-bit digital values to a three-state signal (1, 0, -1). This parameter transformation simplifies the data structure while preserving the essential information needed for frequency adjustment, thereby reducing circuit complexity without sacrificing digital signal processing capability.
2Measurement precision
If multiple bits are used to represent the phase difference value, then the phase difference can be accurately represented, but the number of components and circuit complexity increase
Solution Approach 1:
The patent extracts only the sign and magnitude direction information from the phase difference (positive, zero, negative) rather than representing the complete multi-bit phase difference value. This extraction maintains sufficient precision for frequency adjustment while dramatically reducing the number of components needed.
Solution Approach 2:
Instead of converting analog phase difference to multi-bit digital values through traditional ADC methods, the patent inverts the approach by directly generating a three-state digital signal that represents the essential phase difference information, thereby reducing component count while maintaining functional accuracy.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
A digital phase-locked loop having a phase frequency detector (PFD), a 3-state phase frequency detection converter (3-state PFD converter), a loop filter and a digital voltage-controlled oscillator is provided. The PFD receives an input frequency and a reference frequency and outputs a first signal and a second signal based on the phase difference between the input frequency and the reference frequency. The 3-state PFD converter outputs a 3-state signal according to the first and second signals, wherein the 3-state signal is presented in 1, 0 and -I. The loop filter outputs at least one control bit based on only the 3-state signal. The DCO adjusts the outputted oscillation frequency according to the control bit.