Digital Potentiometer Output Damping for Transient Glitch Control
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Solution Overview
Problem
Conventional digital potentiometers suffer from significant undesired transient glitches during code-to-code transitions, which impact signal integrity and can lead to system breakdowns, and existing solutions either slow down settling time or degrade frequency throughput.
Innovation Solution
A circuit with a capacitor coupled to the analog output, a first resistance to ground, and a switch in parallel with the resistor, where the switch is closed to mitigate transients and then opened, utilizing a logic-driven driver to control the switch's operation, allowing for dynamic damping of glitches without significant area or power overhead.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a large capacitor is used to dampen the undesired transient, then the transient glitch is reduced, but the transient settling time increases and frequency throughput is degraded
Solution Approach 1:
The patent applies dynamics by making the capacitor's connection to the output node dynamic rather than static. A switch controlled by a logic circuit connects the capacitor to the output node only during code transitions when transient glitches occur, and disconnects it during normal operation. This dynamic connection allows the capacitor to dampen transients when needed without continuously affecting the settling time and frequency throughput
Solution Approach 2:
The patent implements periodic action by activating the transient dampening capacitor only during specific periods - namely during code transitions. The logic circuit detects when a code transition is occurring and activates the switch to connect the capacitor during this brief period, then deactivates it afterward. This periodic activation allows transient suppression without continuous impact on system performance
2Object-affected harmful factors
If switch ramp rate is slowed to reduce transient, then transient glitch is reduced, but settling time increases
Solution Approach 1:
The patent extracts the transient suppression function from the main signal path by using a separate capacitor-switch circuit that is activated only when needed. Instead of modifying the ramp rate of the main switches, the invention adds a parallel path with the capacitor that can be independently controlled to suppress transients without affecting the normal switching operation and settling time
3Object-affected harmful factors
If dummy switches are added to reduce transient, then transient glitch is reduced, but device area and complexity increase
Solution Approach 1:
The patent applies universality by making the capacitor and its associated switch serve multiple functions: damping transients during code transitions, maintaining high impedance during normal operation, and being controlled by the existing logic circuit that already monitors code transitions. This multi-functionality avoids the need for additional dummy switches while achieving transient suppression
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Effectively reduces glitches and maintains high frequency throughput by dynamically controlling the switch's resistance, ensuring minimal impact on the output signal and settling time.
Implementation Method 1
a capacitor (520) coupled to an output node (510) of a digital to analog (D/A) resistance ladder
Implementation Method 2
a switch (540) coupled to the capacitor (520)... wherein the switch, when closed, has a second resistance, and the first resistance is greater than the second resistance
Data Source
AI summary
A circuit has a digital to analog (DA) resistance ladder having an analog output; a capacitor coupled to the analog output; a first resistance coupled from the capacitor to ground; and a switch coupled to the capacitor in parallel to the resistor, wherein the switch, when closed, has a second resistance, and the first resistance is greater than the second resistance.