Multiply Partitioned Digital Predistortion for Power Amplifier Linearity
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Solution Overview
Problem
Existing power amplifiers in communication systems, particularly in cellular networks, suffer from non-linear output characteristics due to transistor saturation, leading to distortion and inefficiency, which is exacerbated by the need for power backoff to maintain linearity, resulting in increased power consumption and costs.
Innovation Solution
A system and method that employs a combination of short duration and long duration digital predistortion circuits, along with QR decomposition, to adaptively linearize the power amplifier by synthesizing compensating error signals and applying them to the input signal before transmission, effectively addressing both memoryless and memory-based distortion effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If power amplifiers operate in the saturation region to increase transmit power, then power output increases, but non-linear distortion increases
Solution Approach 1:
The patent applies digital predistortion to the input signal before it reaches the power amplifier. The predistortion circuit pre-modifies the signal to counteract the expected non-linear distortion that will occur during amplification, ensuring that the combined effect of predistortion and amplification produces a linear output relationship.
Solution Approach 2:
The patent implements a feedback mechanism where the output of the power amplifier is monitored and used to adjust the predistortion parameters. This closed-loop system continuously adapts the predistortion characteristics to match the actual non-linear behavior of the amplifier, improving linearization accuracy over time.
2Object-generated harmful factors
If power backoff is applied to maintain linear operation, then non-linear distortion decreases, but power consumption increases
Solution Approach 1:
By applying predistortion before amplification, the system allows the power amplifier to operate in its high-efficiency saturation region while maintaining linear output characteristics. This eliminates the need for power backoff, as the predistorted signal compensates for the amplifier's non-linear behavior, thereby maintaining both linearity and power efficiency.
Solution Approach 2:
The patent replaces the mechanical approach of reducing input power (power backoff) with a signal processing approach (digital predistortion). Instead of lowering the operating point to maintain linearity, the system uses digital signal manipulation to achieve linearity while maintaining high power output and efficiency.
3Object-generated harmful factors
If complex predistortion algorithms are used to improve linearization accuracy, then distortion reduction improves, but computational complexity increases
Solution Approach 1:
The patent divides the predistortion function into multiple independent blocks, each handling specific aspects of the non-linear compensation. This modular architecture allows for efficient implementation of complex algorithms by breaking them down into manageable segments that can be processed separately and combined, reducing overall computational burden.
Solution Approach 2:
The patent implements adaptive predistortion where the complexity of the predistortion algorithm dynamically adjusts based on operating conditions. The system can switch between different levels of predistortion complexity depending on the required linearization accuracy and current amplifier characteristics, optimizing the balance between performance and computational load.
Data Source
AI summary
Digital predistortion system, methods and circuitry for linearizing a non-linear element using a multiply partitioned architecture that first addresses long or “memory” effects, and separately addresses shorter duration effects. These blocks or circuits are operated with the non-linear element to provide a highly linear system. A first or long predistortion block receives a baseband signal input and includes a plurality of parallel memory blocks each including a programmable linearity, a digital filter, summers, multipliers and multiplexers with control signals for configuring the blocks to form filters of different types. A second or short predistortion block is coupled to the long predistortion block and comprises a generalized Nth order polynomial filter coupled to a programmable linear equalizer. The first predistorter block compensates for effects of a longer duration, and the second predistorter block compensates for effects of a shorter duration. Methods for initializing, parameterizing and adapting the system are disclosed.