Multi-Rate Digital Predistortion for RF PA Linearity and Low Power
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Solution Overview
Problem
Current digital predistortion systems for power amplifiers face challenges in achieving accurate distortion compensation while minimizing circuit area and power consumption, and in improving metrics such as error vector magnitude (EVM), adjacent channel leakage ratio (ACLR), and spectrum emission mask (SEM).
Innovation Solution
A multistage, multi-rate digital predistortion system is implemented, utilizing a series of compensator circuits with parallel processing blocks that apply transformation functions, including neural networks and adaptive algorithms, to generate a distortion signal that linearizes the power amplifier input, reducing the number of coefficients and power consumption. The system includes a digital predistortion adaptation circuit that configures coefficients based on power amplifier output using back propagation and least square estimate algorithms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a digital predistortion system is implemented to improve linearity and reduce distortion, then EVM and ACLR are improved, but circuit area and power consumption increase
Solution Approach 1:
The digital predistortion system is divided into multiple parallel processing blocks, each handling specific transformation functions. This segmentation allows the system to achieve high linearity correction capability while distributing the computational load, thereby reducing overall power consumption compared to a monolithic approach.
Solution Approach 2:
The system implements a set of parallel processing blocks that apply transformation functions selectively. By using partial action (only necessary transformations) and avoiding excessive computation, the system achieves the required EVM performance while minimizing power consumption through optimized processing depth and breadth.
2Manufacturing precision
If more processing blocks are added to improve distortion compensation accuracy, then linearity improves, but device complexity increases
Solution Approach 1:
Multiple processing blocks are merged into a parallel architecture where each block handles specific transformation functions. This merging approach achieves high distortion compensation accuracy by combining multiple transformation operations while maintaining manageable circuit area through shared resources and optimized interconnections.
Solution Approach 2:
The system transitions from a single-dimensional sequential processing approach to a multi-dimensional parallel processing architecture. By adding spatial dimension (parallel blocks) and functional dimension (different transformation functions), the system achieves high compensation accuracy without linearly increasing circuit area complexity.
3Stability of the object's composition
If a multistage compensator system is used to improve linearity, then power amplifier output linearity improves, but processing time increases
Solution Approach 1:
The multistage compensator system applies transformation functions in periodic stages rather than continuous sequential processing. This periodic action allows parallel execution of multiple transformation operations within each stage, achieving high output linearity while minimizing processing time through efficient time-multiplexed operation.
Solution Approach 2:
The system performs preliminary transformations in parallel processing blocks before final signal combination. By preparing multiple transformation results in advance and then combining them, the system achieves high linearity correction while reducing overall processing time compared to sequential application of all transformations.
Data Source
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AI summary
An adaptable, multistage, multi-rate digital predistortion system that can increase the accuracy of the distortion applied to a power amplifier input signal is disclosed. Further, the digital predistortion system can be implemented using a reduced circuit area by reducing a number of coefficients used by the models applied to generate the distortion compensation signal. Further, the system can implement an improved digital predistortion adaptation engine that improves an adjacent channel leakage ratio of the digital predistortion system. Moreover, the system can compensate for non-linear impairments due to analog/RF circuits and systems and improve at least the following metrics: Error vector magnitude (EVM), adjacent channel leakage ratio (ACLR), spectrum emission mask (SEM), and power consumption of the circuits and systems. An example of circuits and systems is radio frequency power amplifier (RF PA).