Digital Pre-Processing Chip for Flexible mmWave Transceiver Routing

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Solution Overview

Problem

Existing transceiver architectures for mmW communication face challenges in flexibility, routing complexity, and inefficiencies in power consumption due to the high number of antenna elements, particularly in devices with distributed antennas, and the need for optimized design in both analog and digital beamforming systems.

Innovation Solution

A digital pre-processing chip is introduced, partitioning the traditional mmW RF chips and baseband chip architecture into three segments, with an analog interface to RF chips and a digital interface to the baseband chip, incorporating ADCs, DACs, and pre-processing circuitry to optimize signal processing and reduce interface complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional mmW transceiver architecture with integrated RF and baseband chips is used, then routing complexity and power consumption increase due to high number of antenna elements, but device complexity is reduced

Engineering Contradiction:

Improvetransceiver architecture complexityVSAvoidsignal processing efficiency

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The transceiver architecture is segmented into three independent functional blocks: RF front-end chips, a digital pre-processing chip (DPPC), and a baseband chip. This segmentation allows each block to be optimized independently, reducing overall system complexity while improving signal processing efficiency through specialized functionality in each segment.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The digital pre-processing chip serves as an intermediary block between the RF front-end and baseband processing. It handles ADC/DAC conversions and preliminary signal processing, reducing the computational burden on the baseband chip and simplifying the overall architecture by distributing processing tasks across multiple specialized components.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If digital pre-processing chip is introduced to reduce routing complexity and power consumption, then signal processing flexibility improves, but device complexity increases

Engineering Contradiction:

Improvesignal processing efficiencyVSAvoidtransceiver architecture complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The digital pre-processing chip merges multiple functions (ADC, DAC, digital filtering, and preliminary beamforming) into a single integrated component. This consolidation improves signal processing efficiency by reducing inter-component communication overhead while managing complexity through functional integration rather than proliferation of separate components.

Inventive Principle:

Principle #5Merging (Combining)

3Use of energy by moving object

If RF and baseband chips are decoupled with digital pre-processing chip, then power consumption is reduced and design flexibility improves, but manufacturing complexity increases

Engineering Contradiction:

Improvepower consumptionVSAvoidmanufacturing complexity

Core Design Contradiction:

Use of energy by moving objectVSEase of manufacture

Solution Approach 1:

The transceiver is segmented into independently manufacturable RF front-end chips and baseband chips, with the digital pre-processing chip handling intermediate functions. This segmentation enables specialized manufacturing processes for each block, potentially reducing overall manufacturing complexity despite the increased number of components.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The digital pre-processing chip is designed as a universal interface block that can work with different RF front-end configurations and baseband processing requirements. This multi-functionality simplifies manufacturing by using a standardized intermediate component that can be produced in volume, offsetting the complexity of having multiple specialized components.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12425065B2Digital pre-processing chip for mmWAVE transceiver architectures

Publication Date: 2025.09.23 BEAMMWAVE AB

AI summary

A digital pre-processing chip is disclosed. The digital pre-processing chip comprises an analog interface for transmitting and receiving analog signals to and from a plurality of analog Radio Frequency (RF) chips, and a digital interface for transmitting and receiving digital signals to and from a baseband chip. The digital pre-processing chip further comprises a plurality of Analog-to-Digital Converters (ADCs) for converting a plurality of analog signals received via the analog interface to a plurality of RX digital signals, and a plurality of Digital-to-Analog Converters (DACs) for converting a plurality of TX digital signals to a plurality of analog signals to be transmitted to the plurality of analog RF chips via the analog interface. The digital pre-processing chip further comprises pre-processing circuitry configured to pre-process the plurality of RX digital signals received from the plurality of ADCs to form a pre-processed digital signal to be transmitted to the baseband chip via the digital interface. The pre-processing circuitry is further configured to pre-process a digital signal received via the digital interface to form the plurality of TX digital signals to be transmitted to the plurality of DACs.