Digital PWM Pulse Position Correction for Symmetric Timing
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Solution Overview
Problem
Digital PWM generators face challenges in smaller process node geometries due to design constraints and power requirements, particularly in maintaining pulse position symmetry within PWM cycle periods, leading to distortion in analogue signal conversion.
Innovation Solution
A PWM modulator with a pulse position controller that synchronizes pulse positions within PWM cycle periods using a clock signal, compensating for positional errors through an error block, loop filter, and quantizer, allowing for both odd and even pulse widths to be accurately positioned, reducing overall positional error.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital PWM generators are used with fast clock speeds to avoid quantisation distortion, then pulse position accuracy is improved, but power consumption and circuit complexity increase
Solution Approach 1:
The patent implements a variable clocking strategy where the PWM generator uses a fast clock during critical pulse positioning intervals to maintain accuracy, then switches to a slower clock during less critical periods. This dynamic clock frequency adjustment allows the system to achieve required pulse position accuracy while significantly reducing average power consumption compared to using a continuously fast clock.
Solution Approach 2:
The system dynamically changes operational parameters including clock frequency and pulse generation timing based on the current PWM duty cycle requirements. By adjusting these parameters adaptively rather than using fixed high-performance settings continuously, the patent achieves accurate pulse positioning only when necessary, thereby reducing overall power consumption and circuit stress.
2Measurement precision
If digital PWM generators are used with fast clock speeds to avoid quantisation distortion, then pulse position accuracy is improved, but device complexity increases
Solution Approach 1:
The patent employs dynamic clock frequency switching and adaptive pulse positioning logic that activates only when quantisation errors are detected. This dynamic approach allows the use of simpler circuitry during normal operation while maintaining high accuracy when needed, avoiding the need for continuously complex high-speed circuitry.
Solution Approach 2:
The PWM generator includes self-correcting mechanisms that automatically detect and compensate for quantisation errors without requiring external intervention or complex external circuitry. The error detection and correction functions are integrated into the PWM generator itself, allowing it to maintain high pulse position accuracy using relatively simple onboard logic rather than requiring complex external correction circuits.
3Measurement precision
If pulses are quantised to edges of a fast clock, then timing precision is improved, but positional error from centred position increases
Solution Approach 1:
The patent incorporates feedback mechanisms that monitor the actual pulse positions and compare them against ideal centred positions. When quantisation to fast clock edges causes positional deviations, the feedback system detects these errors and generates correction signals that adjust subsequent pulse positions to maintain proper symmetry and centring, thereby preserving both timing precision and positional accuracy.
Solution Approach 2:
The system preemptively adjusts pulse positioning to compensate for known quantisation errors before they occur. By calculating expected positional deviations from fast clock quantisation in advance, the PWM generator pre-adjusts pulse timing to counteract these errors, ensuring that pulses remain properly centred and symmetric without requiring complex real-time correction.
Data Source
AI summary
This application relates to digital PWM modulation. A PWM modulator (400, 1100) has a PWM generator (402) configured to receive pulse width data (PWidth) and to output a PWM signal (SPWM) comprising a plurality of repeating PWM cycle periods, in which the duration of any pulse of the PWM signal in each PWM cycle period is based on the pulse width data. The PWM generator is configured to synchronise the PWM cycle periods, and the start and end of any PWM pulse, to a received first clock signal. The PWM generator is operable to generate pulses that have a positional error from a centred position within the PWM cycle period and a pulse position controller (403) is configured to control the position of a pulse in a PWM cycle period so as to at least partly compensate for the positional error of one or more preceding pulses.