Digital Return Receiver Aggregation with Common-Clock Synchronization

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Solution Overview

Problem

Conventional digital return receiver systems in hybrid fiber coaxial networks require multiple digital logic circuits, digital-to-analog converters, and RF signal combiners, leading to increased system cost, size, and power consumption due to the need for analog signal processing and RF signal attenuation.

Innovation Solution

Implementing a digital data aggregation technique where multiple digital return signals are combined within a single circuit, using a common timing base to synchronize the signals before digital-to-analog conversion, thereby eliminating the need for RF signal combiners and reducing system complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple digital logic circuits, DAC circuits and RF signal combiners are used to aggregate digital return receiver outputs, then the system can combine multiple receiver paths, but the system cost, circuit size and power consumption increase

Engineering Contradiction:

Improveability to combine multiple receiver pathsVSAvoidnumber of logic circuits, DACs and RF combiners

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent merges multiple digital return receiver paths into a single integrated digital logic circuit that performs aggregation in the digital domain before DAC conversion. This consolidates what were previously separate processing chains into one unified structure, reducing the total number of discrete components while maintaining the ability to handle multiple receiver inputs.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent replaces the mechanical/analog RF signal combining approach with a digital signal processing approach. Instead of using RF combiners that operate on analog signals after DAC conversion, the system performs signal aggregation in the digital domain using logic circuits, which then converts the aggregated signal once through a single DAC, eliminating the need for multiple DACs and RF combiners.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If RF signal combiners are used to combine analog signals, then multiple receiver paths can be aggregated, but signal attenuation increases due to RF signal loss

Engineering Contradiction:

Improveability to aggregate receiver outputsVSAvoidRF signal attenuation

Core Design Contradiction:

Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent performs the aggregation action before the DAC conversion and RF transmission stages. By combining digital return signals in the digital domain prior to conversion, the system avoids the signal losses that occur when combining analog RF signals. The aggregation happens early in the signal chain when signals are still in the digital domain, preventing subsequent attenuation issues.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If multiple DAC circuits are used for each receiver path, then each signal can be converted independently, but the system cost and power consumption increase

Engineering Contradiction:

Improveindependent signal conversionVSAvoidpower consumption of multiple DACs

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple independent DAC conversion operations into a single DAC conversion operation. By aggregating digital signals from multiple receiver paths before DAC conversion, the system maintains signal integrity through digital processing while reducing the number of power-consuming DAC circuits from multiple units to just one.

Inventive Principle:

Principle #5Merging (Combining)

4Ease of manufacture

If conventional digital logic circuits and RF circuitry are used, then the system can process and combine signals, but the cumulative volume and PCB area increase

Engineering Contradiction:

Improvesignal processing capabilityVSAvoidcircuit board area and device volume

Core Design Contradiction:

Ease of manufactureVSVolume of stationary object

Solution Approach 1:

The patent merges multiple separate circuit modules (logic circuits, DAC circuits, RF combiners) into a single integrated digital logic circuit that handles aggregation. This consolidation dramatically reduces the cumulative volume of discrete devices and the PCB area required, as one integrated circuit replaces what would have been multiple separate components spread across the board.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS11362799B2Digital return receiver with digital data aggregation

Publication Date: 2022.06.14 ARRIS ENTERPRISES LLC

AI summary

In some embodiments, a digital clock management system includes input signal conversion circuitry, logic circuitry and output signal conversion circuitry. The input signal conversion circuitry converts input signals to corresponding first digital data streams, each of which contains digital data synchronized to a first data clock. First digital logic circuitry converts the first digital data streams to second digital data streams, each of which contains digital data synchronized to the first data clock, and converts the second digital data streams to third digital data streams, each of which contains digital data synchronized to a common clock. Second digital logic circuitry converts the third digital data streams to a single digital data stream. The output signal conversion circuitry converts the single digital data stream to a modulated output signal.