Segmented Digital RF Converter for Dynamic Range and Low Interference
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Solution Overview
Problem
Existing digital RF converters face limitations in dynamic range and signal-to-noise ratio due to non-ideal analog circuit operations, limited bandwidth, and increased semiconductor substrate area, with previous solutions complicating circuit layout and increasing signal interference.
Innovation Solution
A digital RF converter employing a delta-sigma modulated bits sub-block, a least-significant bit sub-block, and a most-significant bit sub-block, using digital signals to control baseband signals and generate currents with varying magnitudes, thereby improving dynamic range and signal-to-noise ratio without significantly increasing the number of cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of cells connected in parallel is increased to expand dynamic range, then the maximum voltage of the output signal is improved, but the semiconductor circuit layout design becomes complicated and the design area is increased
Solution Approach 1:
The digital-to-RF converter is segmented into multiple sub-blocks, each handling a specific bit range (e.g., MSB sub-block, LSB sub-block). Each sub-block contains a controlled number of cells connected in parallel, preventing the need to manage a large number of cells simultaneously in one layout block. This segmentation reduces layout complexity while maintaining the required dynamic range through the combined output of all sub-blocks.
2Measurement precision
If the number of cells connected in parallel is increased to expand dynamic range, then the maximum voltage of the output signal is improved, but the electrical coupling in the circuit increases to increase signal interference
Solution Approach 1:
By dividing the converter into spatially separated sub-blocks with controlled cell connections, the electrical coupling between cells is reduced. Each sub-block can be physically laid out with adequate spacing and shielding, minimizing signal interference while the digital control signals coordinate the operation of all sub-blocks to achieve the required dynamic range.
Solution Approach 2:
Digital control signals act as intermediaries to coordinate the operation of cells across different sub-blocks. Instead of directly coupling cells through analog signals (which causes interference), digital control signals independently manage each cell's operation, reducing electrical coupling and signal interference while maintaining coherent output for the required dynamic range.
3Reliability
If all circuit functions are integrated into a single circuit, then the transmitter system performance is improved, but the area occupied on the semiconductor substrate is increased
Solution Approach 1:
Each sub-block in the digital-to-RF converter is designed to perform multiple functions: frequency up-conversion, signal amplification, and digital control response. This multi-functionality allows the converter to achieve integrated transmitter system performance without requiring separate dedicated circuits for each function, thereby reducing the overall semiconductor substrate area.
Solution Approach 2:
The invention merges the digital-to-analog conversion function with the frequency up-conversion mixer function into a single integrated digital-to-RF converter circuit. By combining these functions in one circuit block rather than using separate DAC and mixer circuits, the transmitter system achieves improved performance integration while minimizing the semiconductor substrate area occupied.
Data Source
AI summary
A digital RF converter, a digital RF modulator, and a transmitter are provided. The digital RF converter includes a delta-sigma modulated bits (DSMB) sub-block that generates a current magnitude corresponding to least-significant n bits among input signals at a first sampling speed, a least-significant bit (LSB) sub-block that generates a current magnitude corresponding to intermediate k bits among the input signals at a second sampling speed lower than the first sampling speed, and a most-significant bit (MSB) sub block that generates a current magnitude corresponding to most-significant m bits among the inputs signals at the second sampling speed.