Digital RF Power Amplifier Duty-Cycle Control for Higher Efficiency
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Solution Overview
Problem
Conventional digital RF power amplifiers are inefficient and cannot be effectively controlled using conventional biasing and harmonic matching techniques, making them unsuitable for small chip designs and wireless telecommunication frequency applications between 900 MHz and 5.8 GHz.
Innovation Solution
A duty cycle controller adjusts the duty cycle of a digital signal at the carrier radio frequency before amplification, using a delay unit and logic gate to generate a modified digital signal with an optimized duty cycle, which is then amplified by a digital power amplifier, improving efficiency without the need for oversampling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If conventional digital RF power amplifiers are used, then the device can operate at wireless telecommunication frequencies (900 MHz - 5.8 GHz), but the amplifier efficiency is poor and cannot be controlled with conventional techniques
Solution Approach 1:
The patent changes the duty cycle parameter of the digital input signal to optimize amplifier efficiency. By adjusting the duty cycle (the proportion of time the signal is high versus low), the amplifier operates more efficiently at wireless telecommunication frequencies without requiring conventional biasing or harmonic matching techniques.
Solution Approach 2:
The patent employs periodic pulse-width modulation (PWM) to control the amplifier. The digital input signal uses periodic pulses with variable width (duty cycle) to drive the amplifier, enabling efficiency optimization through periodic action rather than continuous analog control.
2Loss of energy
If switching amplifiers (class D or class F) are used to provide digital amplification, then amplification efficiency can be improved, but harmonic tuning networks are required which are bulky and difficult to integrate on a digital chip
Solution Approach 1:
The patent extracts and eliminates the bulky harmonic tuning networks from the amplifier design. By using digital switching amplifiers with duty cycle control, the function of harmonic tuning is achieved through digital signal processing rather than physical analog networks, removing the volume constraint.
Solution Approach 2:
The patent replaces the mechanical/analog harmonic tuning networks with a digital control system. Instead of using physical inductors and capacitors for harmonic tuning, the system uses digital logic and PWM control to achieve the same efficiency benefits, enabling integration on a digital chip.
3Extent of automation
If switching amplifiers are used, then digital amplification is achieved, but the harmonic tuning networks must be operated at frequencies below 300 MHz due to parasitic limitations
Solution Approach 1:
The patent replaces the analog harmonic tuning network with a digital switching architecture that is not constrained by parasitic limitations. The digital logic and PWM control can operate at much higher frequencies (900 MHz - 5.8 GHz) because they do not rely on physical resonant circuits with parasitic inductance and capacitance.
Solution Approach 2:
The patent changes the operating parameters by using digital switching frequencies in the radio frequency range rather than audio frequencies. The PWM signal and digital control operate directly at the desired wireless telecommunication frequencies, eliminating the frequency limitation imposed by analog tuning networks.
Data Source
AI summary
An amplification unit reduces a duty cycle of a digital signal at a carrier radio frequency to optimize the efficiency of the RF power amplifier that amplifies the reduced duty cycle signal. An exemplary amplification unit includes a duty cycle controller and a digital power amplifier. A delay unit in the duty cycle controller applies a delay to an input digital signal at the carrier radio frequency to generate a delayed signal at the carrier radio frequency. A logic gate in the duty cycle controller logically combines the input digital signal with the delayed signal to generate a modified digital signal at the carrier radio frequency, where the modified input digital signal has a reduced duty cycle relative to that of the input digital signal. Amplifying the modified digital signal in the digital RF power amplifier generates an amplified analog signal at the carrier radio frequency while improving amplifier efficiency.