Digital Semiconductor Variable Capacitor With Decoupled AC DC Control
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Solution Overview
Problem
Existing semiconductor variable capacitors face limitations in achieving high capacitance density, wide control range, and low distortion, especially in integrated circuits, due to interference between DC control voltage and AC signal, and are sensitive to process variations.
Innovation Solution
A digital semiconductor variable capacitor with at least three terminals, where one terminal is used to modulate capacitance without overlapping with the DC control voltage, decoupling AC and DC signals, and featuring a structure with a thick conductive plate that splits into two series capacitors by inserting a new dielectric layer, reducing overall capacitance and allowing abrupt capacitance tuning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a two-terminal varactor is used to vary capacitance by modulating DC voltage, then capacitance can be tuned, but the AC voltage becomes superimposed on the DC control voltage causing capacitance distortion
Solution Approach 1:
The invention divides the capacitor into two separate terminals: a control terminal for applying DC voltage and a signal terminal for AC signal passage. This segmentation isolates the control function from the signal function, preventing the superposition problem that causes capacitance distortion in two-terminal varactors.
Solution Approach 2:
The patent introduces an intermediary structure where the control electrode modifies the depletion region in the semiconductor substrate, which in turn affects the capacitance between the signal terminals. This indirect control mechanism allows DC voltage to influence capacitance without directly mixing with the AC signal path.
2Adaptability or versatility
If conventional varactors are used in integrated circuits, then frequency tuning is possible, but capacitance density is limited and process variations affect performance
Solution Approach 1:
The invention changes the fundamental operating parameters by using a three-terminal MOS capacitor structure where capacitance is controlled by gate voltage rather than reverse bias voltage. This allows operation in the accumulation and depletion modes, providing a wider capacitance tuning range and higher capacitance density suitable for integrated circuits.
Solution Approach 2:
The patent employs a composite structure combining metal electrodes, insulator layers (oxide), and semiconductor substrates with specific doping profiles. This composite design optimizes both the capacitance density and the immunity to process variations by carefully selecting and combining different materials with complementary properties.
3Adaptability or versatility
If reverse bias voltage is increased to reduce capacitance in varactors, then capacitance tuning is achieved, but saturation current prevents extremely high capacitance values
Solution Approach 1:
Instead of using reverse bias to control capacitance as in conventional varactors, the invention inverts the approach by using forward gate bias in a MOS structure. The capacitance is controlled by accumulating or depleting carriers in the semiconductor, allowing the capacitance to be reduced toward zero in depletion mode without being limited by saturation current effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution provides high capacitance density, wide control range, and low distortion, making it suitable for integrated circuits with improved reliability and reduced noise susceptibility, while maintaining high quality factor (Q) values.
Implementation Method 1
one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device
Implementation Method 2
featuring a structure with a thick conductive plate that splits into two series capacitors by inserting a new dielectric layer, reducing overall capacitance
Data Source
AI summary
A novel semiconductor variable capacitor is presented. The semiconductor structure is simple and is based on a semiconductor variable capacitor with MOS compatible structure suitable for integrated circuits, which has at least three terminals, one of which is used to modulate the capacitance value between the other two terminals of the device, by increasing or decreasing its DC voltage with respect to one of the main terminals of the device. Furthermore, the present invention decouples the AC signal and the DC control voltage preventing distortion of the RF signal. The present invention describes a controllable capacitor whose capacitance value is not necessarily linear with its control voltage, but although possibly abrupt in its characteristic, is utilized to manufacture a semiconductor variable capacitor with digital control to improve its noise and linearity performance while maintaining high quality factor.