Digital Sinusoid Generator with Doubled Frequency Resolution
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Solution Overview
Problem
Conventional digital sinusoid generators have limited frequency resolution due to the number of samples stored in the sine/cosine lookup table, which cannot be increased without expanding memory, posing constraints on circuit applications such as occupied area, power, and temperature.
Innovation Solution
The solution involves a digital circuit that processes a digital sinusoid signal by applying a delay, addition, and gain scaling to generate a second sinusoid signal, allowing for alternating selection of samples to produce a sinusoid with double the frequency resolution without increasing the number of stored samples, utilizing the mathematical relationship A sin(ωt) + A sin(ωt+α) = 2 A cos(α/2) sin(ωt+α/2) and scaling to cancel phase-dependent constants.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of samples stored in the sine/cosine lookup table is increased to improve frequency resolution, then the frequency resolution is improved, but the memory size and occupied circuit area increase
Solution Approach 1:
The patent changes the parameter of sample spacing by generating two sinusoid signals with different spacing values (first spacing and second spacing) from the same lookup table samples. By alternately selecting samples from these two signals, the effective frequency resolution is doubled without increasing the number of stored samples in the lookup table.
Solution Approach 2:
The patent segments the lookup table samples into two different spacing patterns, creating two separate sinusoid signals with different sample intervals. This segmentation allows the system to achieve higher frequency resolution by combining information from both spaced patterns through alternating selection.
2Measurement precision
If the number of samples stored in the sine/cosine lookup table is increased to improve frequency resolution, then the frequency resolution is improved, but the occupied circuit area increases
Solution Approach 1:
The patent changes the parameter of sample spacing by generating two sinusoid signals with different spacing values (first spacing and second spacing) from the same lookup table samples. By alternately selecting samples from these two signals, the effective frequency resolution is doubled without increasing the number of stored samples in the lookup table.
Solution Approach 2:
The patent segments the lookup table samples into two different spacing patterns, creating two separate sinusoid signals with different sample intervals. This segmentation allows the system to achieve higher frequency resolution by combining information from both spaced patterns through alternating selection.
3Measurement precision
If the number of samples stored in the sine/cosine lookup table is increased to improve frequency resolution, then the frequency resolution is improved, but the power consumption increases
Solution Approach 1:
The patent changes the parameter of sample spacing by generating two sinusoid signals with different spacing values (first spacing and second spacing) from the same lookup table samples. By alternately selecting samples from these two signals, the effective frequency resolution is doubled without increasing the number of stored samples in the lookup table.
Solution Approach 2:
The patent segments the lookup table samples into two different spacing patterns, creating two separate sinusoid signals with different sample intervals. This segmentation allows the system to achieve higher frequency resolution by combining information from both spaced patterns through alternating selection.
Data Source
AI summary
A delay circuit applies a one sample delay to a first digital sinusoid signal and outputs a delayed digital sinusoid signal. The first digital sinusoid signal and the delayed digital sinusoid signal are then added to each other by an adder circuit to generate an added digital sinusoid signal. A gain scaling circuit applies a scaling factor to the added digital sinusoid signal to generate a second digital sinusoid signal. Samples of the first and second digital sinusoid signals are alternately selected by a multiplexing circuit to generate a third digital sinusoid signal having twice as many samples as the first digital sinusoid signal over a same sinusoid period.


