Digital SMPS Controller Using Dual Voltage Thresholds

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Solution Overview

Problem

Existing switched-mode power supply (SMPS) control systems face challenges in achieving regulation stability due to multiple delay stages and the need for analog-to-digital converter resources, which are costly and not always available.

Innovation Solution

A digital controller method and system that compares the SMPS output voltage to upper and lower reference voltage thresholds using comparators, with dedicated counters to detect excursion counts, and a non-linear multi-step digital control loop to adjust the duty cycle of a fixed frequency PWM signal, eliminating the need for analog-to-digital converters and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If ADC and multiple delay stages are used in the control loop, then voltage regulation capability is improved, but regulation stability deteriorates and cost increases

Engineering Contradiction:
Improvevoltage regulation capabilityVSAvoidregulation stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent extracts and eliminates the ADC component from the control loop, replacing it with a voltage divider network and comparator-based detection system. This removal of the ADC eliminates the source of delay and instability while maintaining voltage regulation capability through alternative means.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using an ADC to convert voltage to digital values for processing, the patent inverts the approach by using digital comparators to directly compare voltage thresholds and generate control signals. This inversion eliminates the need for complex digital processing and associated delays.

Inventive Principle:
Principle #13The other way round (Inversion)

2Measurement precision

If ADC is provided in the microcontroller IC unit, then voltage measurement capability is improved, but cost and device complexity increase

Engineering Contradiction:
Improvevoltage measurement capabilityVSAvoiddevice complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent makes the microcontroller's digital I/O pins multi-functional by using them directly as voltage threshold detection inputs through the comparator circuitry. This eliminates the need for dedicated ADC hardware while maintaining voltage measurement capability through the existing digital processing resources.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent creates a simplified digital representation of voltage levels by using comparators to generate binary high/low signals corresponding to voltage thresholds. This digital copy of the voltage state is sufficient for control purposes and eliminates the need for full ADC conversion.

Inventive Principle:
Principle #26Copying

3Measurement precision

If multiple delay stages are used in the feedback control loop, then control precision is improved, but regulation stability deteriorates

Engineering Contradiction:
Improvecontrol precisionVSAvoidregulation stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent implements preliminary action by using a voltage divider network to pre-scale the output voltage to appropriate threshold levels before comparator detection. This pre-processing eliminates the need for multiple digital delay stages while maintaining control precision through proper signal conditioning.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3460968B1Digital control algorithm using only two target voltage thresholds for generating a pulse width modulated signal driving the gate of a power MOS to implement a switch mode power supply
Publication Date: 2021.11.10 NXP USA INC
  • EP3460968B1 patent drawingFigure 1
  • EP3460968B1 patent drawingFigure 2
  • EP3460968B1 patent drawingFigure 3~5

AI summary

A method and system are provided for digitally controlling a switch mode power supply without using analog-to-digital converters by providing an SMPS output in feedback to first and second comparators along with upper and lower reference voltage thresholds to detect excursion counts at dedicated counters which identify how many times an SMPS output voltage exceeds the upper and lower reference voltage thresholds during each cycle of a fixed frequency PWM signal, where the excursion counts are evaluated with a non-linear multi-step digital control loop detection sequence to generate duty cycle adjustment instructions for controlling each duty cycle of the fixed frequency PWM signal.