Digital Switch-Mode Start-Up Circuit for Low-Loss LED Drivers

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Solution Overview

Problem

Conventional start-up circuits for LED-based bulbs face challenges with high power dissipation in power FETs, leading to increased size and cost, and insufficient output currents for digital controllers, particularly when load currents exceed 0.5 milliAmperes.

Innovation Solution

A digitally controlled switch-mode start-up circuit operates the power FET as a switch, reducing power dissipation by coupling the gate to ground, and using a combination of depletion-mode and enhancement-mode power FETs with digital control loops to manage voltage and current, allowing for reduced transistor size and improved efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional start-up circuit with a power FET biased in saturation mode is used, then the circuit can provide continuous current to the controller, but the power dissipation in the FET becomes very high, requiring larger device size and increasing cost

Engineering Contradiction:
Improvecontinuous current supply to controllerVSAvoidpower dissipation in power FET
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies periodic action by switching the power FET on and off in pulsed manner during start-up. The FET is turned on to charge the output capacitor and provide current to the controller, then turned off to eliminate continuous power dissipation. This periodic switching allows the circuit to provide necessary start-up current while minimizing energy loss in the FET, resolving the contradiction between reliable current supply and energy efficiency.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent changes the operating parameters of the power FET from continuous saturation mode to switch-mode operation. By controlling the gate voltage to switch the FET between on and off states, the circuit transforms from a continuous current source to a pulsed current source. This parameter change allows the FET to operate efficiently during transitions while providing sufficient average current to the controller during start-up, reducing power dissipation while maintaining reliability.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If the power FET is made large enough to dissipate heat without exceeding maximum power dissipation specifications, then power dissipation is controlled, but the device size increases and cost increases

Engineering Contradiction:
Improvepower dissipation controlVSAvoiddevice size and cost
Core Design Contradiction:
Loss of energyVSEase of manufacture

Solution Approach 1:

By implementing periodic switching of the power FET, the patent reduces the average power dissipation to levels that can be handled by smaller FET devices. The FET is switched on only when needed to charge the output capacitor and drive the controller, then switched off to eliminate continuous power loss. This allows the use of smaller, less expensive FETs while still meeting power dissipation requirements, resolving the contradiction between power control and manufacturing ease.

Inventive Principle:
Principle #19Periodic action

3Loss of energy

If depletion-mode power FET is used in saturation mode, then the circuit can operate at low power applications, but the solution is limited to load currents less than approximately 0.5 milliAmperes

Engineering Contradiction:
Improvelow power operationVSAvoidload current capability
Core Design Contradiction:
Loss of energyVSAdaptability or versatility

Solution Approach 1:

The patent applies dynamics by transitioning from static saturation mode operation to dynamic switch-mode operation. The power FET is controlled to switch between on and off states based on the charging status of the output capacitor and controller power requirements. This dynamic control allows the circuit to adapt to varying load conditions, providing sufficient current for both low-power applications and higher load currents up to and beyond 0.5 mA, thereby resolving the contradiction between low power operation and load current capability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operating parameters from fixed saturation mode to variable switch-mode operation. By controlling the duty cycle and switching frequency of the power FET, the circuit can deliver appropriate current levels for different load requirements. This parameter adjustment enables the same circuit to handle both low-power applications and higher load currents, expanding adaptability while maintaining efficient power operation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach minimizes power dissipation, reduces transistor size, and enables dimmer compatibility, allowing LED-based bulbs to operate with conventional dimmers and reducing manufacturing costs.

Implementation Method 1

operating a power FET coupled to an input voltage as a switch in a switch-mode start-up circuit

Methodology Applied
Scientific EffectSwitch-mode operation:

Implementation Method 2

a voltage regulator operable to convert the input voltage to an output voltage

Methodology Applied
Scientific EffectVoltage regulation:

Implementation Method 3

The gate drive circuit may couple a ground to a gate of the power FET to turn off the power FET

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentEP3114900B1Digitally-controlled switch-mode start-up circuit for LED based lights
Publication Date: 2024.02.21 SIGNIFY HOLDING BV
  • EP3114900B1 patent drawingFigure 1
  • EP3114900B1 patent drawingFigure 2
  • EP3114900B1 patent drawingFigure 3

AI summary

Power consumption in a start-up circuit for a LED-based light bulb may be reduced by digitally switching a transistor of the start-up circuit coupled to the input voltage. When the transistor is digitally switched between on and off, a reduced amount of power is dissipated by the transistor, because it may not enter a saturation region of operation where the resistance of the transistor between drain and source terminals increases. The transistor may be coupled to a voltage regulator for generating one or more output voltages, including a supply voltage for a host controller IC. The transistor may be switched on and off by a digital signal generated by logic circuitry, which may decide to switch the transistor on and off based on a voltage level at an output of the voltage regulator.