Digital State Device Clock Stretching Override
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Solution Overview
Problem
In circuit communication systems, malfunctioning slave devices can cause data transfers to fail by maintaining a 'latched low condition' indefinitely, and existing workarounds like analog switches are not effective for digital devices, leading to system malfunctions.
Innovation Solution
Implementing a digital state device with preemptive clock stretching, which uses a timer circuit to detect the expiration of a clock stretching event and return control of the clock signal to the master device, allowing the system to resume data transfer by setting the clock signal back to a logical high value.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a slave device performs clock stretching to wait for data processing, then data transfer reliability is improved, but the system can fail if the slave device malfunctions and maintains the low condition indefinitely
Solution Approach 1:
The master device performs a preliminary check by detecting whether the clock signal remains at a low level for an excessively long time. This preliminary detection action allows the system to identify and recover from malfunctioning slave devices before complete system failure occurs, thus preventing the harmful effect of indefinite latched low condition while preserving the useful effect of clock stretching for normal data processing.
Solution Approach 2:
The system implements feedback through the master device monitoring the clock signal duration. When the clock signal stays low beyond a predetermined threshold, the master device detects this abnormal condition and responds by generating a reset signal or alternative clock signal. This feedback mechanism ensures that normal clock stretching operations continue uninterrupted while malfunctioning conditions are automatically detected and corrected, resolving the contradiction between reliability improvement and harmful failure modes.
2Duration of action of stationary object
If analog switches are used to workaround clock stretching issues, then system continuity is improved, but compatibility with digital devices deteriorates
Solution Approach 1:
The invention replaces the mechanical/analog switch-based workaround with a digital signal processing approach. The master device uses digital logic to detect abnormal clock stretching conditions and responds by generating appropriate reset or alternative clock signals. This substitution maintains system continuity during normal operation and enables seamless recovery from malfunctioning slave devices, while being fully compatible with digital devices and preserving the digital nature of the communication system.
Data Source
AI summary
A digital state device may include a first circuit terminal that obtains a clock signal from a first integrated circuit. The digital state device may further include a second circuit terminal that transmits the clock signal to a second integrated circuit. The digital state device may further include digital logic circuitry coupled to the first circuit terminal and the second circuit terminal. In response to obtaining an in-band notification signal in reverse of the clock signal and from the second integrated circuit, the digital logic circuitry sets the clock signal to a first predetermined value. In response to the digital logic circuitry determining that the clock signal exceeds a predetermined amount of time at the first predetermined value, the digital logic circuitry sets the clock signal to a second predetermined value that is different from the first predetermined value.