Digital Sub-Regulators for Independent Voltage Control

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Solution Overview

Problem

In systems where multiple circuit blocks share a common supply rail, the supply voltage is often set to support the highest clock speed, leading to wasted energy in blocks with lower clock speeds, as the voltage cannot be independently adjusted to reduce energy consumption.

Innovation Solution

Implementing digital sub-regulators for each circuit block to allow independent setting of supply voltage below the common supply rail voltage, using a variable-impedance switch with a control circuit that compares the block voltage to a reference voltage and adjusts impedance based on sensed logic values to maintain optimal voltage levels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a common supply rail voltage is used for all circuit blocks, then all blocks can operate with sufficient voltage to support the highest clock speed, but blocks with lower clock speeds consume more energy than necessary

Engineering Contradiction:
Improvevoltage sufficiency for highest clock speedVSAvoidenergy consumption of blocks with lower clock speeds
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the power supply system by introducing individual sub-regulators for each circuit block. Each sub-regulator independently controls the supply voltage to its respective block, allowing voltage to be tailored to the specific clock speed and power requirements of each block rather than using a single common supply voltage for all blocks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by enabling each circuit block to receive a customized supply voltage level matched to its specific performance requirements. Blocks with lower clock speeds receive lower voltages, while blocks requiring higher clock speeds receive higher voltages, optimizing energy consumption at the local level for each block.

Inventive Principle:
Principle #3Local quality

2Speed

If the supply voltage is set to support the highest clock speed, then maximum performance is achieved, but energy is wasted in blocks operating at lower clock speeds

Engineering Contradiction:
Improvemaximum clock speed capabilityVSAvoidenergy waste in lower clock speed blocks
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent implements dynamic voltage control through sub-regulators that can adjust supply voltage levels in real-time based on the operational requirements of each circuit block. This dynamic adjustment allows the system to optimize energy consumption by matching voltage levels to actual clock speed requirements rather than maintaining a static high voltage for all blocks.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage parameter independently for each circuit block through sub-regulators. By varying the supply voltage parameter according to the specific clock speed and performance needs of each block, the system achieves maximum performance where needed while minimizing energy waste in blocks with lower requirements.

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If independent voltage control is implemented for each circuit block, then energy consumption is reduced, but system complexity increases

Engineering Contradiction:
Improveenergy consumption of circuit blocksVSAvoidnumber of sub-regulators and control circuits
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent applies universality by designing sub-regulators with standardized architectures that can be replicated across multiple circuit blocks. Each sub-regulator performs the same fundamental function of voltage regulation, allowing for modular design and implementation that reduces overall system complexity despite the increased number of components.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10491205B2Comparator for globally distributed regulators
Publication Date: 2019.11.26 QUALCOMM INC
  • US10491205B2 patent drawing
  • US10491205B2 patent drawing
  • US10491205B2 patent drawing

AI summary

A method for offset calibration of a voltage comparator is disclosed according to certain aspects of the present disclosure. The method includes applying a first bias voltage to a gate of a first compensation transistor, wherein the first compensation transistor is coupled in series with a first input transistor of the voltage comparator. The method also includes applying a second bias voltage to a gate of a second compensation transistor, wherein the second compensation transistor is coupled in series with a second input transistor of the voltage comparator. The method further includes sensing a logic value at an output of the voltage comparator, and adjusting the first bias voltage and the second bias voltage based on the sensed logic value.