Digital Tracking Error Detection Using Multiple Phase Clocks
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Solution Overview
Problem
Existing optical disk recording reproducers face challenges in digitizing tracking error signal detection due to the need for high-frequency clocks and analog components, making it difficult to realize a digital circuit or system on chip (SoC) for detecting tracking error signals effectively.
Innovation Solution
The apparatus and method utilize a phase extractor, phase difference detector, multiple phase clock generator, phase error detector, and tracking error output unit to digitally detect tracking error signals using multiple phase clocks, allowing for phase error detection and output without increasing clock frequency, thereby simplifying the system and enabling SoC implementation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a high-frequency clock is used to directly count phase differences, then measurement precision is improved, but device complexity increases due to the need for high-frequency clock generation and analog components
Solution Approach 1:
The patent divides the phase error detection process into multiple segments by using multiple phase clocks with different phases (e.g., 0°, 90°, 180°, 270°). Each phase clock counts a specific portion of the phase difference, and the results are combined to achieve the total phase error measurement. This segmentation allows the system to maintain measurement precision while using lower-frequency clocks, thereby reducing device complexity.
Solution Approach 2:
The patent replaces the traditional mechanical/analog PWM integration system with a digital counting system. Instead of using analog pulse width modulation and integration circuits, the invention uses digital counters driven by multiple phase clocks to measure phase differences. This substitution eliminates the need for complex analog components and high-frequency clock generators, reducing overall system complexity while maintaining measurement accuracy.
2Measurement precision
If PWM integration is used to extract phase errors from high-frequency signals, then measurement precision is improved, but device complexity increases due to the need for digital-analog converters and analog passive filters
Solution Approach 1:
The patent replaces the analog PWM integration circuitry with a fully digital implementation. Instead of converting digital phase difference signals to analog form for integration, the invention performs the integration function using digital counters and accumulators. This eliminates the need for digital-analog converters and analog passive filters, significantly reducing circuit complexity while maintaining the ability to accurately extract phase errors from high-frequency signals.
Solution Approach 2:
The patent introduces multiple phase clocks as intermediary signals that facilitate the digital measurement process. These phase clocks serve as mediators between the high-frequency data signal and the lower-frequency counting system, enabling accurate phase difference measurement without requiring direct high-frequency counting or analog processing.
3Measurement precision
If analog components are used for tracking error signal detection, then measurement precision is improved, but ease of manufacture worsens due to the difficulty of digitization and integration into SoC
Solution Approach 1:
The patent replaces analog detection circuits with a fully digital implementation using multiple phase clocks and digital counters. This substitution makes the system compatible with standard CMOS fabrication processes and enables easy integration into system-on-chip (SoC) architectures. The digital nature of the solution eliminates the need for specialized analog components, thereby improving ease of manufacture and integration while maintaining tracking error signal detection accuracy.
4Productivity
If high-frequency clocks are used, then productivity is improved through faster phase error detection, but use of energy increases due to high-frequency clock generation and analog circuit operation
Solution Approach 1:
The patent segments the phase error detection task across multiple lower-frequency phase clocks rather than using a single high-frequency clock. This segmentation allows the system to achieve the same detection throughput by distributing the counting work across multiple clocks, thereby reducing the power consumption associated with high-frequency clock generation and analog circuit operation while maintaining productivity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient digital detection of tracking error signals, facilitating the realization of a system on chip and reducing manufacturing costs while improving product quality and power efficiency by eliminating the need for analog components and high-frequency clock limitations.
Implementation Method 1
The photo detector may convert four divided lights into electrical signals MA, MB, MC, and MD
Data Source
AI summary
An apparatus and method for digitally detecting a tracking error signal using multiple phase clocks. The apparatus includes a phase extractor receiving four divided outputs in response to light reflected from an optical disk and extracting four divided phases, respectively, a phase difference detector detecting phase differences between two phases among the four divided phases, a multiple phase clock generator generating a plurality of phase clocks in response to a predetermined clock signal, a phase error detector counting phase differences in response to each of the plurality of phase clocks, summing the counted phase differences, and detecting a phase error, and a tracking error output unit detecting the tracking error signal in response to the phase error and outputting the detected tracking error signal.