Digital Twin Time Management via Simulation Frame Segmentation
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Solution Overview
Problem
Managing time synchronization in Network Digital Twins (NDTs) is challenging due to the need for consistent synchronization with real-world time, especially when simulating network configurations and validating changes, which requires sophisticated simulation time management to ensure accurate and efficient validation of Network Planning and Optimization functions.
Innovation Solution
The implementation of a method and device for synchronizing a Digital Twin (DT) clock with simulation time corresponding to wall clock time, including mapping simulation frames to specific points in time, synchronizing selected features with key frames, and interpolating features between key frames, while controlling simulation speed and pausing or stopping the simulation as needed, to manage time delays and ensure consistent synchronization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If simulation time is synchronized with wall clock time in real-time, then synchronization accuracy is improved, but system complexity increases due to need for continuous time management and coordination
Solution Approach 1:
The patent segments time management into discrete simulation frames rather than continuous real-time synchronization. Each simulation frame represents a discrete time unit that can be independently managed, allowing the system to track progress without requiring constant coordination with wall clock time, thus reducing complexity while maintaining synchronization accuracy.
Solution Approach 2:
The system performs preliminary time management by pre-defining simulation frames and their corresponding time units before execution. This allows the simulation to proceed through predetermined time steps, reducing the need for dynamic time coordination during runtime and simplifying the synchronization mechanism.
2Productivity
If simulation runs at full speed without interruptions, then productivity is improved, but synchronization reliability deteriorates due to time delays and drift
Solution Approach 1:
The patent implements periodic synchronization checkpoints within the simulation framework. At predetermined intervals (e.g., after completing certain simulation frames), the system performs synchronization checks against wall clock time, allowing the simulation to run at full speed between checkpoints while maintaining reliability through periodic correction of time drift.
3Reliability
If continuous synchronization checks are performed, then synchronization reliability is improved, but loss of time increases due to frequent interruptions and processing overhead
Solution Approach 1:
Instead of continuous synchronization checks, the system performs periodic checks at predetermined intervals based on simulation frame completion. This reduces the frequency of synchronization interruptions while maintaining reliability, as the periodic nature ensures time drift is corrected before it accumulates significantly.
Solution Approach 2:
The system pre-determines synchronization checkpoints based on simulation progress rather than performing checks continuously. This allows the simulation to proceed uninterrupted through predefined time units, minimizing time loss to synchronization overhead while maintaining reliability through strategic checkpoint placement.
4Measurement precision
If simulation time is mapped to specific wall clock time points, then measurement precision is improved, but device complexity increases due to time mapping and interpolation requirements
Solution Approach 1:
The patent segments the time mapping process into discrete simulation frames, each mapping to a specific wall clock time point or interval. This discrete segmentation simplifies the mapping process compared to continuous time mapping, as each frame can be independently associated with time points without requiring complex interpolation algorithms.
Data Source
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Figure 3A~3B
AI summary
A method for managing time in a digital twin (DT) includes synchronizing a DT clock with a simulation time corresponding to a wall clock time being simulated, and controlling the simulation time in synchronization with the DT clock.