Digitally Assisted LDO Regulator for Voltage Undershoot
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Solution Overview
Problem
Portable devices face voltage undershoot issues due to changing loads, which can cause functional errors, and existing solutions require large external capacitors and low-inductance pins, making them difficult to implement effectively.
Innovation Solution
A digitally assisted low-dropout (LDO) regulator system that uses a digital controller and current digital-to-analog converter to provide advance notification of load changes, allowing the system to pre-emptively supply current and reduce or eliminate voltage undershoot by combining currents from the LDO regulator and digital assisted regulator.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large external capacitor is used on the LDO regulator output to stabilize voltage, then voltage undershoot is reduced, but the device requires additional external pins and board real estate
Solution Approach 1:
The patent extracts the capacitor function from external components and integrates it into the LDO regulator chip itself. The regulator includes internal compensation capacitance and control circuitry that provides voltage stabilization without requiring large external capacitors, thereby eliminating the need for additional board real estate and external pins.
Solution Approach 2:
The patent combines multiple functions into the LDO regulator chip: voltage regulation, voltage stabilization, and transient response control are all integrated into a single device. The internal compensation network and control circuitry work together to provide stable voltage output without external capacitors, merging what were previously separate external components into the regulator itself.
2Reliability
If a large external capacitor is used to stabilize voltage, then voltage undershoot is reduced, but additional external pins are required
Solution Approach 1:
The patent removes the requirement for external stabilization capacitors by integrating the necessary capacitance and control functionality directly into the LDO regulator chip. This extraction of the capacitor function from external components eliminates the need for additional package pins and simplifies the overall system configuration.
Solution Approach 2:
The patent merges the capacitor function with the regulator circuitry into a single integrated device. The internal compensation capacitance and control logic are combined with the voltage regulation function, allowing the regulator to maintain stability without external passive components, thereby reducing package pin requirements.
3Reliability
If the package pin inductance is reduced to less than 0.3 nH, then voltage undershoot is reduced, but the package design becomes more difficult
Solution Approach 1:
The patent extracts the voltage stabilization function from the package pin design and implements it internally within the regulator chip. By providing internal compensation capacitance and control circuitry, the regulator does not rely on low-inductance package pins for stability, thereby simplifying package design while maintaining voltage stability.
Solution Approach 2:
Instead of optimizing the package pin inductance to achieve voltage stability, the patent inverts the approach by making the LDO regulator itself capable of providing stability through internal compensation. This reverses the traditional design paradigm where external components and package optimization were required, and now the integrated regulator provides stability independently of package pin characteristics.
4Reliability
If the LDO regulator responds to high-frequency load changes, then voltage stability is maintained, but the regulator requires expanded bandwidth which increases complexity
Solution Approach 1:
The patent implements an advance notification mechanism where the regulator is alerted before a load change occurs. This preliminary notification allows the regulator to proactively adjust its output current and expand its bandwidth in anticipation of the load change, maintaining voltage stability without requiring continuously high bandwidth operation that would increase complexity.
Solution Approach 2:
The patent makes the regulator bandwidth dynamic rather than static. The regulator adjusts its bandwidth based on operational needs: expanding bandwidth when load changes are anticipated and maintaining normal bandwidth during steady-state operation. This dynamic adjustment maintains voltage stability under load changes while avoiding the continuous complexity of high-bandwidth design.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces voltage undershoot, eliminates the need for large external capacitors, and extends the current delivery capacity, making the LDO regulator stable across a wider range of loads without increasing package pin requirements or board real estate.
Implementation Method 1
A digital to analog converter (DAC) is enabled in response to an advance notification signal supplied by a system circuit
Implementation Method 2
The error amplifier has a non-inverting input receiving a reference voltage and an inverting input receiving a feedback voltage from the output of the voltage regulator
Implementation Method 3
A pass transistor that provides current to a load
Data Source
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AI summary
Techniques are described that embed a digital assisted regulator with an LDO regulator on a chip without requiring a capacitor external to the chip and to regulate a voltage without undershoot. The digital assisted regulator responds to information regarding operation of the LDO regulator and to a signal that provides advance notification of a load change. When the advance notification signal is received, the digital assisted regulator pulls a circuit's supply voltage up to a chip's incoming supply voltage. When the correct operating voltage has been reached and any undershoot problem removed, the digital assisted regulator balances the current it provides with the current provided by the LDO regulator, to allow a quick response time for other load changes. Also, bandwidth of an LDO regulator may be expanded by use of an advance notice signal to increase bias current of an LDO output device to meet an upcoming load change.