Digitally Controlled Oscillator With Configurable DAC Filtering
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Solution Overview
Problem
FMCW radar systems require a low noise, highly linear chirp signal with fast settling time, but CMOS deep-submicron process devices face challenges with increased DAC noise and oscillator gain due to lower supply voltage compared to SiGeCmos process devices, necessitating a solution to enhance frequency accuracy and reduce noise contributions.
Innovation Solution
A digitally controlled oscillator with a filtering DAC component and a voltage-controlled oscillator (VCO) featuring a configurable capacitive load, allowing for adjustable filtering bandwidth to minimize DAC noise during chirp phases and reduce settling time during reset phases, implemented within a phase-locked loop for FMCW radar systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If CMOS deep-submicron process devices are used with 1V supply, then device integration and scalability are improved, but DAC noise contribution and oscillator gain requirements increase
Solution Approach 1:
A configurable capacitive load is introduced as an intermediary element between the DAC and VCO. This capacitive load acts as a mediator that can be adjusted to optimize the noise performance and settling time characteristics of the oscillator system when operating with CMOS deep-submicron process devices at 1V supply
Solution Approach 2:
The capacitive load value is made configurable/adjustable, allowing the system to optimize its performance parameters. By changing the capacitive load parameter, the system can minimize DAC noise contribution during chirp phases and reduce settling time during reset phases, thereby resolving the noise issues associated with low-voltage CMOS operation
2Reliability
If oscillator gain is increased five times in CMOS deep-submicron devices, then chirp dynamic range is maintained, but DAC noise contribution increases
Solution Approach 1:
The configurable capacitive load serves as an intermediary that decouples the relationship between increased oscillator gain and DAC noise contribution. By adjusting the capacitive load, the system can maintain the required chirp dynamic range while minimizing the noise amplification effect of the higher gain
Solution Approach 2:
The capacitive load parameter is adjusted to compensate for the increased oscillator gain. This parameter change allows the system to maintain adequate signal levels for the required dynamic range while reducing the bandwidth of noise contributions from the DAC
3Object-generated harmful factors
If filtering bandwidth is reduced to minimize DAC noise, then noise performance improves, but settling time between chirp phases increases
Solution Approach 1:
The capacitive load is made dynamically configurable, allowing the system to adjust the filtering characteristics in real-time. During chirp phases, the capacitive load is configured to provide strong filtering to minimize DAC noise, while during reset phases, the capacitive load can be adjusted to allow faster settling, thus resolving the time-bandwidth tradeoff
Solution Approach 2:
The system employs periodic reconfiguration of the capacitive load to match the periodic nature of chirp signal generation. The capacitive load is adjusted periodically between chirp phases and reset phases, optimizing noise filtering during signal generation while enabling fast settling during transitions
Data Source
AI summary
A digitally controlled oscillator comprising a filtering digital to analogue converter, DAC, component and a voltage controlled oscillator, VCO, component comprising at least one control terminal arranged to receive a control voltage output by the DAC component; wherein the DAC component comprises a voltage generation component arranged to generate the control voltage and at least one configurable capacitive load component to which the control voltage is applied such that a filtering bandwidth of the DAC component is configurable by way of the at least one configurable capacitive load component.