DIMM Error Detection Segmentation for Fault Isolation
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Solution Overview
Problem
When multiple dual inline memory modules (DIMMs) are concurrently operated, it is difficult to specify which DIMM has incurred an uncorrectable error, leading to potential misidentification of a functioning DIMM as faulty and hindering fault reproduction.
Innovation Solution
An information processing device is designed to perform a first test on concurrently operating DIMMs to detect errors, and upon detecting an uncorrectable error, it switches to an independent mode to perform a second test on each DIMM separately to identify the faulty module, using error correction codes like S8EC (144, 128) and S4EC to correct and detect errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple DIMMs are concurrently operated using memory lock step technology, then data processing capacity and encoding efficiency are improved, but the ability to detect and locate uncorrectable errors deteriorates
Solution Approach 1:
The patent segments the error detection process into two distinct phases: a first test phase that operates DIMMs concurrently to detect errors efficiently, and a second test phase that operates DIMMs separately to locate the specific faulty DIMM. This segmentation allows the system to maintain high productivity during normal operation while providing comprehensive error location capability when needed.
Solution Approach 2:
The patent implements dynamic switching between different operational modes (concurrent mode for first test, separate mode for second test) based on error detection needs. The system transitions from a static concurrent operation model to a dynamic multi-phase testing approach, allowing the operational characteristics to adapt according to whether error detection or error location is the primary objective.
2Reliability
If concurrent operation of DIMMs is used, then system reliability is improved through error detection, but the precision of fault identification deteriorates
Solution Approach 1:
The patent divides the testing process into two segmented phases: the first phase uses concurrent operation with ECC codes to maximize reliability and detect errors, while the second phase uses separate operation mode to achieve precise fault identification. Each phase is optimized for its specific objective, with the first phase prioritizing error detection and the second phase prioritizing accurate location.
Solution Approach 2:
The patent employs feedback from the first error detection phase to trigger the second error location phase. When an uncorrectable error is detected during concurrent operation, the system uses this feedback information to initiate a targeted second test that separately operates the DIMMs to identify the specific faulty module, thereby achieving both high reliability detection and precise fault identification.
Data Source
AI summary
An information processing device includes a plurality of memories, and a processor coupled to the plurality of memories and configured to carry out a first test to determine whether a first error is detected when first and second memories of the plurality of memories are concurrently operated, and when the first error is detected from the first test, carry out a second test to determine whether a second error is detected when the first and second memories are separately operated.