DIMM Flash Memory Controller Polling Offload
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Solution Overview
Problem
The performance of systems that use processor-polling for dual in-line memory module (DIMM) form factor flash memory is impacted, as the processor is occupied with polling tasks, leading to reduced system efficiency during read and write transactions.
Innovation Solution
A controller is introduced to handle the polling of the DIMM form factor flash memory, allowing the processor to focus on other tasks by receiving read and write requests, transmitting them to the DIMM, polling the queues, copying data, and sending invalidate commands, thereby shifting the polling responsibility from the processor to the controller.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the processor polls the DIMM form factor flash memory to determine transaction statuses, then the processor can directly monitor memory operations, but the performance of the processor and entire system is impacted due to the processor being occupied with polling tasks
Solution Approach 1:
The patent extracts the polling function from the processor and assigns it to a dedicated controller. The controller independently polls the DIMM form factor flash memory to determine transaction statuses, while the processor is freed to perform other computational tasks. This separation of duties resolves the contradiction by maintaining reliable status monitoring through the controller while improving overall system productivity by releasing the processor from polling obligations.
Solution Approach 2:
The controller acts as an intermediary between the processor and the DIMM form factor flash memory. It handles the polling operations and transaction status determination, serving as a mediator that allows the processor to interact with memory operations without being directly occupied with the polling loop. This intermediary role enables the processor to maintain system control while delegating the time-consuming polling task to the controller.
2Reliability
If the processor is occupied with polling tasks during read and write transactions, then transaction statuses can be monitored, but system efficiency is reduced
Solution Approach 1:
The polling task is extracted from the processor's workload and assigned to the controller. The controller continuously monitors transaction statuses by polling the DIMM form factor flash memory, while the processor remains available for other computational tasks. This extraction eliminates the time the processor would spend on polling, resolving the contradiction between reliable status determination and processor availability.
Solution Approach 2:
The controller performs self-service by independently handling the polling operations without requiring processor intervention. It autonomously determines transaction statuses and manages the data transfer process, allowing the processor to focus on higher-level tasks. This self-service capability of the controller resolves the time loss contradiction by making polling operations independent of processor availability.
Data Source
AI summary
Methods, apparatuses, and computer program products for memory access to a dual in-line memory module (DIMM) form factor flash memory are provided. Embodiments include receiving, by a controller from a processor through cacheable memory in the processor, a read request; transmitting, by the controller, the read request to the DIMM form factor flash memory; polling, by the controller, a read queue in the DIMM form factor flash memory until data is ready for the read request; copying from the DIMM form factor flash memory, by the controller, the data corresponding to the read request to a read queue in the controller; transmitting, by the controller on an interface between the controller and the processor, an invalidate command for the cacheable memory; and in response to receiving the invalidate command, reading by the processor the data stored in the read queue in the controller.


