Dimmer Decoder with Low Duty Cycle Handling for LED Drivers

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Solution Overview

Problem

Conventional dimmer switches often cause flickering and fail to dim LEDs across their full range of illumination, as they are designed for incandescent or halogen light bulbs and are not optimized for LED technology.

Innovation Solution

A dimmer decoder integrated circuit chip that translates phase cut dimmer switch signals into a PWM output, enabling precise control of LED brightness by using a combination of digital angle detection, dynamic hold current generation, and variable filter speeds to manage low-frequency duty cycles and power factor correction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional dimmer switches are used with LEDs, then the dimmer can control incandescent or halogen light bulbs, but the LEDs experience flickering and cannot be dimmed across their full range of illumination

Engineering Contradiction:
Improvecompatibility with conventional dimmer switchesVSAvoidflickering and dimming range
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a dimmer decoder circuit as an intermediary device between the conventional dimmer switch and the LED driver. This decoder translates the phase-cut dimmer signal into appropriate control signals for the LED driver, enabling full-range dimming without flickering while maintaining compatibility with existing dimmer switches.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dimmer decoder dynamically adjusts parameters such as duty cycle, frequency, and hold current based on the input signal characteristics. By changing these parameters adaptively, the system achieves smooth dimming across the full illumination range and eliminates flickering that occurs with conventional direct connection methods.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If phase cut dimmer signals are directly applied to LED drivers, then the dimmer switch can control LED brightness, but low duty cycle signals cause premature shutdown and loss of power factor correction

Engineering Contradiction:
Improvebrightness controlVSAvoidpremature shutdown and power factor correction
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The dimmer decoder generates a hold current signal in advance during low duty cycle periods to prevent the LED driver from shutting down prematurely. This preliminary action ensures that the driver maintains operation and continues providing power factor correction even when the dimmer output signal would normally cause shutdown.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system monitors the dimmer signal characteristics and provides feedback control to adjust the hold current generation accordingly. When low duty cycle signals are detected, the feedback mechanism activates the hold current to prevent shutdown, thereby maintaining reliable operation and power factor correction throughout the dimming range.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8947010B2Dimmer decoder with low duty cycle handling for use with LED drivers
Publication Date: 2015.02.03 NAT SEMICON CORP
  • US8947010B2 patent drawing
  • US8947010B2 patent drawing
  • US8947010B2 patent drawing

AI summary

A method includes receiving a sense signal having multiple pulses, where the sense signal is based on an output of a dimmer. The method also includes, for each of multiple sampling periods, (i) identifying a pulse duty cycle by sampling at least one pulse in the sense signal and calculating a duty cycle of the at least one pulse and (ii) generating an output value identifying a duty cycle for driving one or more LEDs. The output value is based on the pulse duty cycle. The method further includes generating a holding current for the dimmer (i) during the sampling of the at least one pulse in at least one of the sampling periods and (ii) when the pulse duty cycle is less than a specified threshold. The holding current can be applied continuously when the pulse duty cycle is less than the specified threshold (such as 15%).