Dimming Power Supply Circuit for Closed-Case FPGA Rewriting
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Solution Overview
Problem
Existing dimming power supply devices require opening the case or detaching it to rewrite the control program for the dimming FPGA, which lowers operability and increases the risk of errors during program rewriting.
Innovation Solution
A dimming power supply device with a trigger input connector and an FPGA writing enabling circuit that allows for safe and easy rewriting of the dimming FPGA without opening the case, using a tri-state buffer to switch between FPGA writing mode and dimming mode, and a photocoupler to isolate input signals, enabling program rewriting through exposed terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the control program is rewritten by opening or detaching the case, then the dimming FPGA can be reprogrammed, but the operability is lowered and the process becomes complex
Solution Approach 1:
A photocoupler is introduced as an intermediary component between the external controller and the dimming FPGA. The photocoupler receives rewrite commands through exposed terminals and optically couples them to the FPGA, enabling program rewriting without opening the case. This mediator component solves the contradiction by providing a safe, isolated interface that maintains operability while enabling adaptability.
Solution Approach 2:
The mechanical process of opening or detaching the case is replaced with an electrical/optical signal transmission system. Instead of physically accessing the FPGA through case removal, rewrite commands are transmitted electronically through exposed terminals via the photocoupler, substituting a mechanical operation with an electrical system that is both safer and more convenient.
2Adaptability or versatility
If the case is opened to rewrite the control program, then the dimming FPGA can be accessed, but the risk of errors increases and safety is compromised
Solution Approach 1:
The photocoupler serves as an isolation barrier that electrically separates the external rewriting controller from the internal dimming FPGA circuitry. This optical coupling prevents ground loops, voltage spikes, and electrical noise from affecting the FPGA, thereby reducing error risk while maintaining the ability to rewrite programs through exposed terminals.
Solution Approach 2:
The photocoupler provides beforehand cushioning by isolating the sensitive FPGA circuit from potential electrical disturbances before they can cause errors. This protective measure is built into the rewriting interface, cushioning the system against electrical shocks, noise, and grounding issues that would otherwise increase error risk during program rewriting operations.
3Ease of operation
If exposed terminals are used for signal input, then the device configuration is simplified and operability is improved, but signal isolation may be compromised
Solution Approach 1:
The photocoupler acts as an intermediary that accepts signals from exposed terminals while providing optical isolation. External controllers can easily connect to the exposed terminals without worrying about electrical interference, and the photocoupler converts these electrical signals into optical signals that are immune to electromagnetic interference, thus maintaining both ease of operation and signal integrity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables safe and error-reduced rewriting of the dimming FPGA control program, improving operability by allowing program changes without opening the case and simplifying the device configuration.
Implementation Method 1
A signal, which is input to at least one terminal of the plurality of terminals, is input to the photocoupler
Data Source
AI summary
A dimming power supply device includes a case, a trigger input connector, a trigger input circuit, an FPGA writing enabling circuit, and a dimming FPGA. The trigger input circuit, the FPGA writing enabling circuit, and the dimming FPGA are disposed inside the case. A plurality of terminals are disposed in the trigger input connector. A signal input to at least one terminal of the plurality of terminals is input to the trigger input circuit. A signal input to the at least one terminal of the plurality of terminals is input to the FPGA writing enabling circuit. In an FPGA writing mode, a circuit configuration of the dimming FPGA is rewritten by inputting an output signal of the FPGA writing enabling circuit. In a dimming mode, a light source is dimmed by inputting an output signal of the trigger input circuit as a trigger.