DIMM Failure Prediction via Interrupt Suspension

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Solution Overview

Problem

Existing information handling systems face challenges in effectively predicting and managing memory failures in Double-Data Rate Dual In-Line Memory Modules (DDR DIMMs, particularly due to increasing correctable read errors associated with aging DIMMs, which can lead to uncorrectable errors and system failure if not promptly addressed.

Innovation Solution

The implementation of a failure prediction mechanism using a leaky-bucket algorithm within the information handling system, where a memory controller tracks correctable read errors, issues interrupts, and a failure predictor accumulates these errors, providing warnings when thresholds are exceeded, allowing for proactive replacement of potentially failing DIMMs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the system continuously accumulates and counts all correctable read errors, then the failure prediction becomes more accurate, but the system generates excessive interrupts and processor overhead

Engineering Contradiction:
Improvefailure prediction accuracyVSAvoidprocessor overhead
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts and suspends the accumulation of errors that occur during transient conditions (such as thermal expansion/contraction cycles) from the continuous error counting process. By identifying and excluding these spurious error bursts, the system maintains accurate failure prediction without being overwhelmed by excessive interrupts during normal operational variations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The system implements preliminary suspension of error accumulation when transient conditions are detected, preventing the unnecessary counting of errors that would later be identified as spurious. This preliminary action avoids generating excessive interrupts and processor overhead while maintaining the integrity of the failure prediction data.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the system suspends error accumulation during transient conditions, then false failure predictions are reduced, but the detection of actual failures may be delayed

Engineering Contradiction:
Improvefailure prediction reliabilityVSAvoidfailure detection time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically adjusts the error accumulation process by implementing time-based thresholds and suspension durations. The suspension is not permanent but temporary, allowing the system to resume counting after transient conditions subside. This dynamic approach ensures that actual failures are eventually detected while filtering out transient error bursts.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system uses feedback mechanisms to monitor error patterns and distinguish between transient bursts and genuine failure indicators. By analyzing the rate and pattern of errors over time, the system can determine when to suspend accumulation and when to resume, ensuring that actual failures are not missed while reducing false predictions.

Inventive Principle:
Principle #23Feedback

3Speed

If the failure predictor processes every interrupt immediately, then real-time monitoring is maintained, but system performance degrades due to constant interrupt handling

Engineering Contradiction:
Improveresponse speedVSAvoidsystem throughput
Core Design Contradiction:
SpeedVSProductivity

Solution Approach 1:

The system implements periodic evaluation of error accumulation rather than continuous processing of every interrupt. By using time-based thresholds and suspension mechanisms, the system processes errors at regulated intervals, maintaining real-time monitoring capability while reducing the frequency of interrupt handling and preserving system throughput.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS10705901B2System and method to control memory failure handling on double-data rate dual in-line memory modules via suspension of the collection of correctable read errors
Publication Date: 2020.07.07 DELL PROD LP
  • US10705901B2 patent drawing
  • US10705901B2 patent drawing
  • US10705901B2 patent drawing

AI summary

An information handling system includes a processor, a dual in-line memory module (DIMM), and a memory controller coupled to the DIMM. The memory controller provides interrupts to the processor each time a read transaction from the DIMM results in a correctable read error. The processor instantiates a failure predictor that receives the interrupts, accumulates a count of the interrupts, and provides an error indication when the count exceeds an error threshold. The failure predictor receives a first in time interrupt, suspends the accumulation of the count for a first duration of time in response to receiving the first in time interrupt, and resumes the accumulation of the count. In resuming the accumulation of the count, the failure predictor increments the count each time the predictor receives a first subsequent interrupt and decrements the count in accordance with an error leak rate.