DIMM PPR History Storage for RAS Enablement

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Solution Overview

Problem

Current information handling systems face limitations in effectively managing memory failures in dual inline memory modules (DIMMs) due to the high-level storage of past failure history, which restricts the effectiveness of reliability, availability, and serviceability (RAS) features, and increases memory failure rates and downtime.

Innovation Solution

The proposed solution involves storing post-package repair (PPR) history at a fine-grained level on non-volatile memory within the DIMM, including a failed row count for each rank of DRAM, allowing the BIOS to assess DIMM health and perform corrective actions such as mapping out failing rows, adjusting operating speeds, and sending alerts, thereby improving RAS features and predicting future DRAM behavior.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If PPR history is stored at a high-level in non-volatile memory, then the system structure is simpler, but the RAS feature effectiveness is reduced and memory failure rates increase

Engineering Contradiction:
ImproveRAS feature effectivenessVSAvoidhistory storage structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the PPR history data into fine-grained components, storing failed row counts separately for each rank of each DRAM device within the DIMM. This granular segmentation enables the BIOS to perform targeted corrective actions on specific failing ranks or devices, significantly improving RAS feature effectiveness compared to high-level aggregate storage.

Inventive Principle:
Principle #1Segmentation

2Reliability

If fine-grained PPR history is stored for each DRAM rank, then RAS feature effectiveness is improved, but the storage space and data structure complexity increase

Engineering Contradiction:
Improvememory failure predictionVSAvoidstorage space
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent applies local quality by storing detailed PPR history information specifically at the DRAM rank level where it is most needed for failure analysis and prediction. Rather than uniformly storing data for all components, the fine-grained approach focuses storage resources on the granular level (individual ranks) that provides the most value for reliability assessment, optimizing the trade-off between storage space and predictive capability.

Inventive Principle:
Principle #3Local quality

3Loss of time

If high-level PPR history storage is used, then the system is easier to implement, but memory downtime and debugging time increase

Engineering Contradiction:
Improvedebugging timeVSAvoidimplementation complexity
Core Design Contradiction:
Loss of timeVSEase of manufacture

Solution Approach 1:

The patent implements preliminary action by storing detailed PPR history information for each DRAM rank in advance, before failures occur. This pre-stored fine-grained data enables the BIOS to quickly assess DIMM health status and perform corrective actions without requiring time-consuming debugging or analysis, directly reducing memory downtime while the implementation complexity is managed through structured data organization.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10725671B2Dual inline memory provisioning and reliability, availability, and serviceability enablement based on post package repair history
Publication Date: 2020.07.28 DELL PROD LP
  • US10725671B2 patent drawing
  • US10725671B2 patent drawing
  • US10725671B2 patent drawing

AI summary

An information handling system for DIMM provisioning and RAS enablement may include a memory subsystem that may comprise a DIMM including a set of ranks, each rank of the set of ranks may include a set of DRAMs, each DRAM of the set of DRAMs including a set of rows, and a non-volatile memory associated with the DIMM. The DIMM may include a post package repair (PPR) history including a set of PPR history entries. Each PPR history entry of the set of PPR history entries may include a failed row count for each rank of a corresponding DRAM of the DIMM. The information handling system may also include a BIOS that may determine whether health of the DIMM is unhealthy that may be based on the PPR history. When the health of the DIMM may be unhealthy, the BIOS may also perform a PPR corrective action procedure.