Diode-Array Surge Protection Circuit for Multi-Line Power Buses

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Solution Overview

Problem

Existing surge protection systems for AC and DC voltage lines require multiple surge protection devices (SPDs) for each power line and common bus, increasing cost and size, and previous solutions either require diodes in the surge path or increase the number of SPDs, which are inefficient.

Innovation Solution

A surge protection circuit using a pair of SPDs and a diode array, where each power line is coupled to both SPDs via diodes, allowing current flow through the SPDs during surges and isolating from earth ground without diodes in normal conditions, reducing the number of required SPDs and diodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If distinct SPDs are required between each power line and earth ground and between the common bus and earth ground, then complete surge protection is achieved, but the cost and size of the surge protection system increase

Engineering Contradiction:
Improvesurge protection completenessVSAvoidnumber of SPDs
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple surge protection functions into a single integrated SPD unit. This single SPD protects multiple power lines (L1, L2, L3) and the neutral line (N) simultaneously by providing multiple surge protection terminals that can handle surges between different lines and earth ground, eliminating the need for separate SPDs for each line combination.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The SPD is designed with multi-functionality to protect against surges on multiple power lines and the common bus simultaneously. The device includes multiple terminals (T1, T2, T3, T4, T5) that can handle various surge scenarios (line-to-ground, line-to-line, neutral-to-ground) with a single device, making it a universal protection solution.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the number of SPDs is increased to protect against line-to-line surges, then surge protection coverage is improved, but the cost and size increase

Engineering Contradiction:
Improvesurge protection coverageVSAvoidnumber of SPDs
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The SPD integrates multiple surge protection capabilities within a single device. The terminal configuration (T1-T5) allows the single SPD to protect against line-to-ground, neutral-to-ground, and line-to-line surges simultaneously, combining what would otherwise require multiple separate SPDs into one unified protection device.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration provides effective surge protection for multiple power lines and a common bus with reduced components, minimizing cost and size while ensuring complete voltage surge protection without diodes in the surge path.

Implementation Method 1

A diode array includes a first plurality of diodes, each diode of the first plurality of diodes including an anode coupled to a respective power line of the plurality of power lines and a cathode coupled to the second terminal of the first SPD

Methodology Applied
Scientific EffectDiode rectification: Diode

Data Source

PatentUS20250023342A1Surge protection circuit
Publication Date: 2025.01.16 AES GLOBAL HLDG PTE LTD
  • US20250023342A1 patent drawing
  • US20250023342A1 patent drawing
  • US20250023342A1 patent drawing

AI summary

A surge protection circuit includes a first surge protection device (SPD) including a first terminal coupled to a voltage potential and a second terminal. A second SPD includes a first terminal coupled to the voltage potential and a second terminal. A diode array includes a first plurality of diodes, each diode of the first plurality of diodes including an anode coupleable to a respective power line of an electronic circuit and a cathode coupled to the second terminal of the first SPD. The diode array also includes a second plurality of diodes, each diode of the second plurality of diodes including a cathode coupled to a respective power line of the electronic circuit and an anode coupled to the second terminal of the second SPD. The second terminal of the first SPD is further coupled to a common power bus of the electronic circuit.