Diode Interconnection Layout for Fixed Positive Charge Suppression
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Solution Overview
Problem
The fabrication of diode structures in semiconductor integrated circuits (ICs) can lead to the presence of positively charged particles within dielectric structures, attracting electrons and causing performance degradation in diodes.
Innovation Solution
The implementation of charge potential equivalence control (CPEC) structures, which include extra electrical interconnection structures and P-type doped regions, to prevent positively charged plasma from entering the IC device and to attract and neutralize electrons that would otherwise congregate near the dielectric structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If diode structures are fabricated in semiconductor ICs, then functional density increases and circuit integration is achieved, but positively charged particles are generated within dielectric structures causing device performance degradation
Solution Approach 1:
A conductive via structure is introduced as an intermediary element between the anode and cathode of the diode structure. This via structure serves as a mediator to drain off positive charges that accumulate in the dielectric structure during fabrication, preventing charge buildup that would otherwise attract electrons and degrade device performance. The via is filled with conductive material and extends through the dielectric structure to provide a charge dissipation path.
Solution Approach 2:
The conductive via structure is electrically connected to both the anode and cathode, creating equipotential regions that prevent potential differences from forming across the dielectric structure. By establishing equal potential conditions, the via structure eliminates the electric field that would otherwise attract electrons toward positively charged regions in the dielectric, thereby preventing performance degradation.
2Productivity
If scaling down process is continued to increase production efficiency, then geometry size decreases and production costs are lowered, but fabrication challenges increase including charge particle generation
Solution Approach 1:
The conductive via structure is formed during the fabrication process as a preliminary measure to prevent charge accumulation before it can cause problems. The via is created and filled with conductive material in advance, establishing a charge dissipation pathway before the diode structure is fully fabricated and before charge buildup occurs during subsequent processing steps.
Solution Approach 2:
The fabrication process parameters are modified to include the formation and filling of conductive vias at specific stages. The via structure changes the electrical parameters of the device by providing an additional conductive path, which alters the charge distribution characteristics and enables the device to function properly at scaled dimensions.
3Ease of manufacture
If conventional diode fabrication processes are used, then manufacturing simplicity is maintained, but positively charged particles accumulate in dielectric structures attracting electrons and degrading performance
Solution Approach 1:
The harmful positive charges that accumulate in the dielectric structure are extracted and drained away through the conductive via structure. The via acts as an extraction pathway, removing the charged particles from their harmful location in the dielectric and transporting them to the conductive regions where they can be dissipated, thereby eliminating the source of electron attraction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The CPEC structures effectively prevent the entry of positively charged plasma and reduce the number of electrons attracted to the dielectric structure, thereby improving the performance and reliability of diode structures in ICs.
Implementation Method 1
P-type doped regions... to attract and neutralize electrons that would otherwise congregate near the dielectric structure
Data Source
AI summary
A diode includes a P-type region, an N-type region, and an undoped intrinsic region. A first conductive contact and a second conductive contact are each disposed over a first side of the diode. The first conductive contact is electrically coupled to the P-type region from the first side. The second conductive contact is electrically coupled to the N-type region from the first side. A first conductive via and a second conductive via are each disposed over a second side of the diode. The second side is different from the first side. The first conductive via is electrically coupled to the P-type region from the second side. The second conductive via is electrically coupled to the N-type region from the second side. The first conductive contact is electrically coupled to the first conductive via. The second conductive contact is electrically coupled to the second conductive via.