Diode-Connected Transistor Gate Bias Correction Circuit

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Solution Overview

Problem

Diode-connected transistors with small threshold voltages face manufacturing variance issues, leading to operational mode changes due to temperature and manufacturing tolerance, which affects their ability to function as diodes, especially when transitioning from enhanced to depletion mode, resulting in unintended reverse current flow.

Innovation Solution

A correcting gate bias circuit is implemented using resistors and transistors to ensure diode-connected transistors operate as diodes regardless of mode, by adjusting the gate bias to maintain functionality across varying threshold voltages and temperatures, allowing for efficient reverse current blocking.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If diode-connected transistors are designed with small threshold voltages to reduce forward voltage drop, then forward voltage drop is reduced, but manufacturing variance causes mode transitions between enhanced and depletion modes affecting reverse current blocking capability

Engineering Contradiction:
Improveforward voltage dropVSAvoidreverse current blocking capability
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent implements a dynamic biasing circuit that automatically adjusts the gate bias voltage based on the transistor's operating conditions. The circuit includes a bias transistor whose gate voltage is controlled by a voltage divider network, allowing the bias to adapt when the main transistor transitions between enhanced and depletion modes, thereby maintaining reliable reverse current blocking while preserving low forward voltage drop

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs a feedback mechanism where the bias transistor's operation is influenced by the main transistor's state. The voltage divider network (R1, R2) provides feedback control that detects changes in the transistor's operating mode and adjusts the gate bias accordingly, ensuring continuous reverse current blocking capability despite manufacturing variance and temperature effects

Inventive Principle:
Principle #23Feedback

2Reliability

If manufacturing tolerance is reduced to maintain consistent threshold voltage, then mode transition is prevented, but manufacturing cost and complexity increase

Engineering Contradiction:
Improveoperational mode consistencyVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the operating parameters by introducing an adjustable gate bias voltage through the bias transistor and voltage divider network. This allows the transistor to operate reliably in reverse current blocking mode regardless of threshold voltage variations caused by manufacturing tolerance, eliminating the need for tight manufacturing specifications while maintaining consistent performance

Inventive Principle:
Principle #35Parameter changes

3Reliability

If complex circuits are used to ensure reverse current blocking, then reliability is improved, but device complexity and cost increase

Engineering Contradiction:
Improvereverse current blocking capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes the bias transistor serve multiple functions: it provides gate bias control, enables reverse current blocking, and adapts to mode transitions. The voltage divider network (R1, R2) simultaneously sets the bias point and provides feedback control. This multi-functional approach achieves reliable reverse current blocking with minimal additional components, avoiding the need for complex dedicated protection circuits

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10725491B2Methods and apparatus to correct gate bias for a diode-connected transistor
Publication Date: 2020.07.28 TEXAS INSTRUMENTS INC
  • US10725491B2 patent drawing
  • US10725491B2 patent drawing
  • US10725491B2 patent drawing

AI summary

Methods, systems, and apparatus to correct gate bias for a diode-connected transistor are disclosed. An example apparatus includes a first resistor including a first resistor terminal and a second resistor terminal; a second resistor including a first resistor terminal and a second resistor terminal; a first transistor including a current terminal and a gate terminal, the current terminal of the first transistor coupled to the first resistor terminal of the first resistor and the gate terminal of the first transistor is coupled to the second resistor terminal of the first resistor; and a second transistor including a first current terminal and a second current terminal, the first current terminal of the second transistor coupled to the gate terminal of the first transistor, and the second current terminal of the second transistor coupled the first current terminal of the second resistor.