High-Speed Diode Crystal Defect Gradient for Surge Noise
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Solution Overview
Problem
Conventional high-speed diodes used in inverter circuits for electric vehicles and hybrid electric vehicles face challenges in reducing surge voltage noise at low currents due to the early depletion layer impact on thin wafers, which affects their performance in high-power applications.
Innovation Solution
A high-speed diode design featuring a pn junction with a gradual decrease in crystal defects from the surface to the bottom, combined with electron beam irradiation using a predetermined absorber to control the dose distribution, which helps in optimizing the recombination time and reducing surge voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If electron beam irradiation is applied uniformly to the entire wafer, then reverse recovery time is shortened, but surge voltage noise increases at low currents
Solution Approach 1:
The patent applies local quality by creating a non-uniform distribution of crystal defects through selective electron beam irradiation. The irradiation dose is controlled to be higher near the pn junction and lower toward the back surface, creating different defect densities in different regions. This local variation in defect quality optimizes recombination time near the junction while minimizing surge voltage generation in the bulk material.
Solution Approach 2:
The patent changes the parameter of electron beam irradiation dose distribution from uniform to non-uniform. By controlling the relative dose to decrease with depth from the front surface, the patent optimizes the balance between reverse recovery performance and surge voltage reduction. This parameter change transforms the irradiation profile to achieve both contradictory goals simultaneously.
2Speed
If the wafer thickness is reduced to improve switching speed, then reverse recovery time decreases, but depletion layer impact on surge voltage increases
Solution Approach 1:
The patent applies local quality by creating a gradient distribution of crystal defects that is concentrated near the pn junction region and decreases toward the back surface. This localized defect distribution optimizes carrier recombination where needed while leaving the bulk material with fewer defects, thereby reducing surge voltage generation even in thin wafers.
Solution Approach 2:
The patent employs the skipping principle by allowing the electron beam irradiation to naturally decrease in dose with depth, effectively 'skipping' the creation of excessive defects in the deeper regions of the wafer. This automatic dose attenuation with depth helps reduce surge voltage without requiring additional structural modifications.
3Speed
If crystal defects are increased to shorten reverse recovery time, then switching performance improves, but surge voltage noise increases
Solution Approach 1:
The patent applies local quality by creating a spatially varying distribution of crystal defects through controlled electron beam irradiation. The defect density is highest near the pn junction where rapid recombination is needed, and gradually decreases toward the back surface where excessive defects would generate surge voltage. This local differentiation resolves the contradiction between speed and noise.
Solution Approach 2:
The patent changes the parameter of crystal defect concentration from uniform to gradient-based. By controlling the electron beam irradiation dose to decrease with depth, the patent creates an optimal defect profile that balances reverse recovery time reduction with surge voltage suppression, achieving both performance improvement and noise reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a high-performance diode with reduced reverse recovery time and surge voltage noise, effectively addressing market demands for high-speed diodes with improved efficiency and reliability.
Implementation Method 1
introducing a lifetime killer by means of electron beam irradiation in order to shorten a reverse recovery time
Implementation Method 2
crystal defects are formed such that the frequency of appearance is gradually decreased from an upper surface of the p-type semiconductor layer toward a bottom surface of the n-type semiconductor layer
Data Source
AI summary
A high-speed diode includes an n-type semiconductor layer and a p-type semiconductor layer which is laminated on the n-type semiconductor layer, where a pn junction is formed in a boundary portion between the n-type semiconductor layer and the p-type semiconductor layer, and crystal defects are formed such that the frequency of appearance is gradually decreased from the upper surface of the p-type semiconductor layer toward the bottom surface of the n-type semiconductor layer.


