Semiconductor Diode Lifetime Control Layer Placement
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Solution Overview
Problem
The reverse recovery characteristic of diodes with a pillar region is not significantly improved by providing a lifetime control layer in the cathode region near the anode region, due to suppressed hole inflow from the anode region, resulting in low hole density near the anode and high hole density farther away, which limits the effectiveness of the reverse recovery current suppression.
Innovation Solution
A semiconductor device with a diode that includes a pillar region and a lifetime control layer with high crystal defect density in the cathode region on the back side of the semiconductor substrate, positioned where hole density is high during operation, effectively extinguishing holes during reverse recovery and reducing reverse recovery current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a lifetime control layer is provided in the cathode region near the anode region, then carrier lifetime is shortened and holes can be extinguished quickly, but in diodes with pillar regions the hole density near the anode is already low so the reverse recovery characteristic is not significantly improved
Solution Approach 1:
The patent applies local quality by placing the lifetime control layer specifically in the cathode region at positions farther from the anode region, where hole density is high during operation. This localized placement targets the area that actually contributes to reverse recovery current in pillar-region diodes, making the structure more effective without unnecessary complexity elsewhere.
Solution Approach 2:
The patent changes the spatial dimension of lifetime control layer placement from near the anode region to farther from the anode region in the cathode. This dimensional repositioning addresses the unique hole distribution pattern in pillar-region diodes, where holes accumulate farther from the anode, thereby improving reverse recovery characteristic effectiveness.
2Productivity
If the diode operates with forward voltage, then current flows through the pillar region with electrons as primary carriers, but hole inflow to the cathode region is suppressed resulting in low hole density near the anode
Solution Approach 1:
The patent recognizes that hole density is not uniformly distributed in the cathode region during forward operation. By placing the lifetime control layer in regions farther from the anode where holes naturally accumulate, the patent targets the local areas that actually contribute to reverse recovery current, making the structure more effective.
3Reliability
If holes are discharged from the cathode region to the anode electrode during reverse recovery, then reverse recovery current flows, but the number of holes is small due to suppressed inflow during forward operation
Solution Approach 1:
The patent applies preliminary action by placing the lifetime control layer in advance in the cathode region at positions farther from the anode. This pre-positioned layer shortens carrier lifetime specifically where holes accumulate during forward operation, so that when reverse recovery occurs, holes are quickly extinguished before they can form significant reverse recovery current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The placement of the lifetime control layer in the cathode region on the back side of the semiconductor substrate efficiently extinguishes holes, thereby improving the reverse recovery characteristic and reducing the reverse recovery current in diodes with pillar regions.
Implementation Method 1
A lifetime control layer having crystal defects is provided in the cathode region on a back side than a middle portion of the semiconductor substrate in a thickness direction of the semiconductor substrate
Data Source
AI summary
A semiconductor device includes a diode and a semiconductor substrate. The diode includes a p-type anode region and an n-type cathode region. A lifetime control layer is provided in an area within the cathode region. The area is located on a back side than a middle portion of the semiconductor substrate in a thickness direction of the semiconductor substrate. The lifetime control layer has crystal defects which are distributed along a planar direction of the semiconductor substrate. A peak value of a crystal defect density in the lifetime control layer is higher than a crystal defect density of a front side region adjacent to the lifetime control layer on a front side of the lifetime control layer and a crystal defect density of a back side region adjacent to the lifetime control layer on a back side of the lifetime control layer.