Diode Linearizer Parallel Core Units Gain Compensation

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Solution Overview

Problem

The existing diode linearizers for GaAs-based or GaN-based compound semiconductor power amplifiers have limited range of gain compensation and increased insertion loss due to design limitations, making it difficult to maintain linearity across varying operation frequencies and amplifier changes.

Innovation Solution

A diode linearizer configuration with multiple parallel linearizer core units connected via capacitors between the RF signal path and ground, eliminating the need for FET switches and series capacitors for DC blocking, allowing for selective operation of units with different gain expansion characteristics and reducing circuit size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a conventional diode linearizer with single linearizer core unit is used, then the circuit configuration is simple, but the range of gain compensation is limited and insertion loss increases

Engineering Contradiction:
Improvecircuit configurationVSAvoidrange of gain compensation
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The linearizer is divided into multiple linearizer core units (first, second, and third units) with different gain expansion characteristics. Each unit handles a specific gain range, allowing the system to compensate for a wider range of amplifier gain variations by selecting the appropriate unit based on operating conditions.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If FET switches and series capacitors are added for selective operation, then the gain compensation range increases, but the device complexity and circuit size increase

Engineering Contradiction:
Improveselective operation capabilityVSAvoidcircuit components
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent removes the FET switches and series capacitors from the conventional configuration. Instead, the linearizer core units are directly connected in parallel between the RF signal path and ground, eliminating the need for additional switching components and DC blocking capacitors while maintaining selective operation capability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Multiple linearizer core units with different gain expansion characteristics are combined in parallel configuration. This merging of units allows the system to provide wide-range gain compensation without requiring external switching mechanisms, as the units naturally operate based on their inherent characteristics.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If multiple linearizer core units are connected in parallel via capacitors, then the gain expansion range increases, but the insertion loss when linearizer is off increases

Engineering Contradiction:
Improvegain expansion rangeVSAvoidinsertion loss
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

Instead of connecting linearizer units in series with the RF signal path (which would cause insertion loss when off), the units are connected in parallel between the RF signal path and ground. This inverted configuration allows the units to be effectively disconnected from the signal path when not in use, minimizing insertion loss while maintaining gain expansion capability.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration increases the range of gain compensation, reduces insertion loss when the linearizer is off, and enhances gain expansion, resulting in improved linearity and reduced circuit size without the need for additional components like switches or series capacitors.

Implementation Method 1

The capacitors 21 and 22 are circuit elements necessary to electrically separate a DC bias voltage of a circuit connected outside the input and output terminals 1 and 2 and a DC bias voltage applied to the diode 41

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

The cathode of the diode 41 is grounded further via an RF blocking inductor 51. Idio indicated by an arrow shows a DC current flowing in the diode 41. By the function of the inductor 51, the Idio flows from the bias terminal 3 to the ground, and the RF signal does not leak in a ground direction

Methodology Applied
Scientific EffectElectrical Induction: Electromagnetic Induction

Data Source

PatentUS11031914B2Diode linearizer
Publication Date: 2021.06.08 MITSUBISHI ELECTRIC CORP
  • US11031914B2 patent drawing
  • US11031914B2 patent drawing
  • US11031914B2 patent drawing

AI summary

A diode linearizer according to the present invention has parallelly mounting linearizer core units on a RF signal path via capacitors between the RF signal path and a ground, thus does not need a switch using an FET, for example, at a time of selectively operating a plurality of linearizer core units. Moreover, the diode linearizer does not need a capacitor in series for blocking a direct current between RF signal input and output terminals. Thus, a range of a gain which can be compensated by the diode linearizer can be increased. Furthermore, an insertion loss of the RF signal path in a state where the diode linearizer is off can be reduced, and a range of a gain expansion in operation can be increased. The switch is not used, or the number of elements of the capacitors which are needed is small, thus a circuit size is also small.